Provided is a laser mark printing method and a method of producing a laser-marked silicon wafer that can reduce the machining strain left around dots constituting a laser mark. In a method of printing a laser mark having a plurality of dots on a silicon wafer, the plurality of dots are formed using laser light having a wavelength in the ultraviolet region.

The present disclosure relates to a semiconductor packaging method. The method includes: providing a first wafer; and performing a wafer stacking operation a plurality of times. The wafer stacking operation includes: forming a first to-be-bonded wafer in the shape of a boss, where the first to-be-bonded wafer includes a base and a protrusion from the base, and orientating the protrusion toward a second to-be-bonded wafer and bonding the protrusion to the second to-be-bonded wafer; forming a first dielectric layer on a surface of the protrusion; and performing second trimming on an edge region of the protrusion and an edge region of the second to-be-bonded wafer, so that the remainder of the second to-be-bonded wafer after the second trimming is in the shape of a boss, and using the remainder of the wafer stack after the second trimming as the first to-be-bonded wafer for next wafer stacking.

A method of fabricating a semiconductor device includes forming a first semiconductor region at a front surface of a substrate, the first semiconductor region including an active element that regulates current flowing in a thickness direction of the substrate; grinding a rear surface of the substrate; after the grinding, performing a first etching that etches the rear surface of the substrate with a chemical solution including phosphorus; after the first etching, performing a second etching that etches the rear surface with an etching method with a lower etching rate than the first etching; and after the second etching, forming a second semiconductor region through which the current is to flow, by implanting impurities from the rear surface of the substrate.

Provided are semiconductor packages having through electrodes and methods of fabricating the same. The method may include may include forming a wafer-level package including first semiconductor chips stacked on a second semiconductor chip, forming a chip-level package including fourth semiconductor chips stacked on a third semiconductor chip stacking a plurality of the chip-level packages on a back surface of the second semiconductor substrate of the wafer-level package, polishing the first mold layer of the wafer-level package and the first semiconductor chips to expose a first through electrodes of the first semiconductor chip, and forming outer electrodes on the polished first semiconductor chips to be connected to the first through electrodes, respectively.

An indium phosphide substrate, a method of inspecting thereof and a method of producing thereof are provided, by which an epitaxial film grown on the substrate is rendered excellently uniform, thereby allowing improvement in PL characteristics and electrical characteristics of an epitaxial wafer formed using this epitaxial film. The indium phosphide substrate has a first main surface and a second main surface, a surface roughness Ra1 at a center position on the first main surface, and surface roughnesses Ra2, Ra3, Ra4, and Ra5 at four positions arranged equidistantly along an outer edge of the first main surface and located at a distance of 5 mm inwardly from the outer edge. An average value m1 of the surface roughnesses Ra1, Ra2, Ra3, Ra4, and Ra5 is 0.5 nm or less, and a standard deviation σ1 of the surface roughnesses Ra1, Ra2, Ra3, Ra4, and Ra5 is 0.2 nm or less.

A method comprises depositing a mask layer on a front-side surface of a wafer, wherein a portion of the wafer has a first resistivity; with the mask layer in place, performing an ion implantation process on a backside surface of the wafer to implant a resistivity reduction impurity into the wafer through the backside surface of the wafer to lower the first resistivity of the portion of the wafer to a second resistivity; after performing the ion implantation process, removing the mask layer from the front-side surface of the wafer; and forming semiconductor devices on the front-side surface of the wafer.

A first film (3) is formed on a front surface of a semiconductor wafer (1). A second film (4) is formed on the first film (3). A surface protection film (5) is formed to cover the first film (3) and second film (4). After forming the surface protection film (5), a reverse surface of the semiconductor wafer (1) is etched with a chemical liquid. The first film (3) is formed on an outer peripheral section of the semiconductor wafer (1). The second film (4) is not formed on the outer peripheral section of the semiconductor wafer (1). The first film (3) and the surface protection film (5) are adhered to each other in the outer peripheral section of the semiconductor wafer (1). The first film (3) has a higher adhesion to the surface protection film (5) than the second film (4).

A gettering property evaluating method for a wafer includes: a gettering layer forming step of polishing a back surface opposite to a front surface of a semiconductor wafer by use of a polishing wheel to form polishing marks on the back surface and to form a gettering layer inside the semiconductor wafer and beneath the polishing marks; an imaging step of imaging at least a unit region of the back surface formed with the polishing marks by imaging means; a counting step of counting the number of the polishing marks having a width of 10 to 500 nm present in the unit region imaged; and a comparing step of comparing the number of the polishing marks counted by the counting step with a predetermined value to determine whether or not the counted number is not less than the predetermined value.

The invention relates to an epitaxially coated semiconductor wafer, processed by a method in which the semiconductor wafer is disposed on a susceptor in a coating apparatus and processed, wherein an etching gas is passed through the coating apparatus in an etching step. A first side of the semiconductor wafer which has been subjected to a polishing operation by CMP, or a second side of the semiconductor wafer opposite the first side, is coated with a protective layer before processing. The resulting wafer has exceptional geometry, as reflected by low ESFQR values.

A wafer processing method includes a modified layer forming step of applying a laser beam so as to focus the laser beam inside the wafer, and form a modified layer along each division line, a wafer supporting step of attaching an expandable dicing tape to the back side of the wafer and mounting the peripheral portion of the dicing tape to an annular frame before or after performing the modified layer forming step, a tape expanding step of expanding the dicing tape attached to the back side of the wafer, and an air blowing step of blowing air against the wafer in the condition where the dicing tape is expanded, thereby dividing the wafer into individual device chips along each division line where the modified layer is formed and also increasing the spacing between any adjacent ones of the device chips.