H01L21/02024

METHODS FOR POLISHING SEMICONDUCTOR SUBSTRATES
20230197455 · 2023-06-22 ·

Methods for polishing semiconductor substrates are disclosed. The methods may involve alternating a first and second polishing slurry during polishing. The first and second slurries each contain silica particles with the silica particles of the first slurry containing more silica than the particles of the second slurry. By alternating between first and second polishing slurries, the polishing method may improve wafer flatness.

METHOD FOR MANUFACTURING A BONDED SOI WAFER

Method for manufacturing a bonded SOI wafer by bonding a bond wafer and base wafer, each composed of a silicon single crystal, via an insulator film, including the steps: depositing a polycrystalline silicon layer on the base wafer bonding surface side, polishing the polycrystalline silicon layer surface, forming the insulator film on the bonding surface of the bond wafer, bonding the polished surface of the base wafer polycrystalline silicon layer and bond wafer via the insulator film; thinning the bonded bond wafer to form an SOI layer; wherein, in the step of depositing the polycrystalline silicon layer, a wafer having a chemically etched surface as base wafer; chemically etched surface is subjected to primary polishing followed by depositing the polycrystalline silicon layer on surface subjected to the primary polishing, and in the step polishing the polycrystalline silicon layer surface, which is subjected to secondary polishing or secondary and finish polishing.

METHOD FOR POLISHING SILICON WAFER WITH REDUCED WEAR ON CARRIER, AND POLISHING LIQUID USED THEREIN

Provided is a method that is for polishing a silicon wafer by a polishing device using a carrier holding the silicon wafer, and that can reduce wear on the carrier. In this polishing method, a polishing liquid used in the polishing device contains 0.1-5 mass %, in terms of the concentration of silica, silica particles comprising: silica particles (A) having an average primary particle size of 4-30 nm as measured by BET, and having an (X2/X1) ratio of 1.2-1.8, where X2 (nm) represents an average particle size along the major axis thereof as calculated from a perspective projection image obtained using an electron beam, and X1 (nm) represents the average primary particle size as measured by BET; and silica particles (B) having an average primary particle size of more than 30 nm but not more than 50 nm as measured by BET, and having a (X2/X1) ratio of 1.2-1.8, where X2 (nm) represents an average particle size along the major axis thereof as calculated from a perspective projection image obtained using an electron beam, and X1 (nm) represents the average primary particle size as measured by BET, wherein the mass ratio of the silica particles (A) to the silica particles (B) is 100:0 to 85:15.

MANUFACTURING METHOD FOR A SUBSTRATE WAFER
20230173633 · 2023-06-08 · ·

A manufacturing method for a substrate wafer, including: a wafer having a first and second main surface; forming a flattening resin layer on second main surface; with the flattening resin layer adsorbed and held as a reference surface, grinding or polishing first main surface as a first processing; removing flattening resin layer from the wafer; with the wafer's first main surface subjected to the first processing adsorbed and held, grinding or polishing second main surface as a second processing; with the second main surface subjected to second processing adsorbed and held, further grinding or polishing first main surface as a third processing; with first main surface subjected to third processing adsorbed and held, further grinding or polishing second main surface as a fourth processing to obtain a substrate wafer, wherein first processing and/or third processing is executed such that the wafer has a central concave or central convex thickness distribution.

POLISHING COMPOSITION AND POLISHING METHOD
20230174821 · 2023-06-08 · ·

Provided is a polishing composition that contains a cellulose derivative and can improve the polishing removability and enhance the wettability of a polished surface of a silicon wafer. The polishing composition contains an abrasive, a cellulose derivative, a basic compound, and water. Here, the polishing composition has a zeta potential of -24.0 mV or more.

SILICON CARBIDE SUBSTRATE, METHOD FOR PRODUCING SAME, AND METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE

A silicon carbide substrate is composed of silicon carbide, and when a main surface thereof is etched with chlorine gas, the overall length of linear etch-pit groups observed in the main surface is equal to or less than the diameter of the substrate.

METHOD OF EVALUATING GETTERING PROPERTY
20170338158 · 2017-11-23 ·

A gettering property evaluating method for a wafer includes: a gettering layer forming step of polishing a back surface opposite to a front surface of a semiconductor wafer by use of a polishing wheel to form polishing marks on the back surface and to form a gettering layer inside the semiconductor wafer and beneath the polishing marks; an imaging step of imaging at least a unit region of the back surface formed with the polishing marks by imaging means; a counting step of counting the number of the polishing marks having a width of 10 to 500 nm present in the unit region imaged; and a comparing step of comparing the number of the polishing marks counted by the counting step with a predetermined value to determine whether or not the counted number is not less than the predetermined value.

VACUUM CHUCK, BEVELING/POLISHING DEVICE, AND SILICON WAFER BEVELING/POLISHING METHOD
20170330783 · 2017-11-16 · ·

A vacuum chuck includes: a vacuum chuck stage having a circular vacuum surface; a vacuum protection pad provided to the vacuum surface; an annular or arc-shaped concave portion dividing the vacuum surface into a central region located closer to a center of the vacuum surface and an outer circumferential region located on an outer circumferential side; and radially-extending concave portions formed in the central region. The vacuum protection pad has through holes in communication with the radially-extending concave portions, and the vacuum protection pad is bonded to the vacuum surface at the central region excluding the radially-extending concave portions.

Polishing composition
11261346 · 2022-03-01 · ·

The present invention provides a polishing composition for use in polishing a material having a Vickers hardness of 1500 Hv or higher. The polishing composition comprises an alumina abrasive and water. The alumina abrasive has an isoelectric point that is below 8.0 and is lower than the pH of the polishing composition.

APPARATUS FOR POLISHING A WAFER AND METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE USING THE SAME
20230170222 · 2023-06-01 ·

A method for fabricating a semiconductor device includes providing a polishing pad which includes a first region and a second region separated from each other by a fence, loading a wafer onto the first region, providing a slurry solution onto the first region, providing an ultrapure water onto the second region, turning the polishing pad to polish a surface of the wafer, and unloading the wafer from the polishing pad after polishing on the surface of the wafer is completed, wherein the fence includes a first fence extending from a center of the polishing pad toward an edge of the polishing pad in a first horizontal direction, and a second fence extending from the center of the polishing pad toward the edge of the polishing pad in a second horizontal direction different from the first horizontal direction.