Patent classifications
H01L21/02118
SEMICONDUCTOR DEVICE AND IMPRINT METHOD
In general, according to one embodiment, there is provided a semiconductor device including a substrate, an insulating layer formed above the substrate, and a conductive layer provided in the insulating layer. The insulating layer includes at least one cellulose fiber.
PASSIVE COMPONENT Q FACTOR ENHANCEMENT WITH ELEVATED RESISTANCE REGION OF SUBSTRATE
An integrated circuit (IC) includes a semiconductor substrate and an interconnect region. The semiconductor substrate has a first surface and a second surface opposite the first surface. The semiconductor substrate has a first region with a passive component. The semiconductor substrate has a second region outside the first region. The resistance of the second region is smaller than the resistance of the first region. The interconnection region is on the second surface of the semiconductor substrate.
Self-assembled nanostructures including metal oxides and semiconductor structures comprised thereof
A self-assembled nanostructure comprises first domains and second domains. The first domains comprise a first block of a block copolymer material and an activatable catalyst. The second domains comprise a second block and substantially without the activatable catalyst. The activatable catalyst is capable of generating catalyst upon application of activation energy, and the generated catalyst is capable of reacting with a metal oxide precursor to provide a metal oxide. A semiconductor structure comprises such self-assembled nanostructure on a substrate.
Method for forming semiconductor structure
A method for forming a semiconductor structure includes following operations. A first substrate including a first side, a second side opposite to the first side, and a metallic pad disposed over the first side is received. A dielectric structure including a first trench directly above the metallic pad is formed. A second trench is formed in the dielectric structure and a portion of the first substrate. A sacrificial layer is formed to fill the first trench and the second trench. A third trench is formed directly above the metallic pad. A barrier ring and a bonding structure are formed in the third trench. A bonding layer is disposed to bond the first substrate to a second substrate. A portion of the second side of the first substrate is removed to expose the sacrificial layer. The sacrificial layer is removed by an etchant.
Localized etch stop layer
In one embodiment, a method includes providing a substrate comprising a source/drain contact region and a dummy gate, forming a first etch stop layer aligned to the source/drain contact region, where the first etch stop layer does not cover the dummy gate. The method may include forming a second etch stop layer over the first etch stop layer, the second etch stop layer covering the first etch stop layer and the dummy gate. The method may include converting the dummy gate to a metal gate. The method may include removing the second etch stop layer using a plasma etching process. The method may include removing the first etch stop layer.
Metal capping layer and methods thereof
A method and structure for forming an enhanced metal capping layer includes forming a portion of a multi-level metal interconnect network over a substrate. In some embodiments, the portion of the multi-level metal interconnect network includes a plurality of metal regions. In some cases, a dielectric region is disposed between each of the plurality of metal regions. By way of example, a metal capping layer may be deposited over each of the plurality of metal regions. Thereafter, in some embodiments, a self-assembled monolayer (SAM) may be deposited, where the SAM forms selectively on the metal capping layer, while the dielectric region is substantially free of the SAM. In various examples, after selectively forming the SAM on the metal capping layer, a thermal process may be performed, where the SAM prevents diffusion of the metal capping layer during the thermal process.
PROTECTIVE FILM SUBSTANCE FOR LASER PROCESSING AND METHOD OF PROCESSING WORKPIECE
A protective film substance for laser processing includes a solution including a water-soluble resin, an organic solvent, and a light absorbent. The solution has an absorbance, i.e., an absorbance converted for a solution diluted 200 times, equal to 0.05 or more per an optical path length of 1 cm at a wavelength of 532 nm. Alternatively, the protective film substance for laser processing includes a solution including a water-soluble resin, an organic solvent, and a polyhydroxyanthraquinone derivative.
CYCLIC PLASMA PROCESSING
A method for processing a substrate includes performing a cyclic plasma process including a plurality of cycles, each cycle of the plurality of cycles including purging a plasma processing chamber including the substrate with a first deposition gas including carbon. The substrate includes a first layer including silicon and a second layer including a metal oxide. The method further includes exposing the substrate to a first plasma generated from the first deposition gas to selectively deposit a first polymeric film over the first layer relative to the second layer; purging the plasma processing chamber with an etch gas including fluorine; and exposing the substrate to a second plasma generated from the etch gas to etch the second layer.
Encapsulated flexible electronics for long-term implantation
Provided are methods of making a long-term implantable electronic device, and related implantable devices, including by providing a substrate having a first encapsulation layer that covers at least a portion of the substrate, the first encapsulation layer having a receiving surface; providing one or more electronic devices on the first encapsulation layer receiving surface; and removing at least a portion of the substrate from the first encapsulation layer; thereby making the long-term implantable electronic device. Further desirable properties, including device lifetime increases during use in environments that are challenging for sensitive electronic device components, are achieved through the use of additional layers such as longevity-extending layers and/or ion-barrier layers in combination with an encapsulation layer.
Pattern formation method and method of manufacturing semiconductor device
A pattern formation method includes forming an organic film on a substrate, processing the organic film to form an organic film pattern, exposing the organic film pattern to an organic gas, and exposing the organic film pattern to a metal-containing gas, and after (i) exposing the organic film pattern to the organic gas and (ii) exposing the organic film pattern to the metal-containing gas, treating the organic film pattern with an oxidizing agent.