H01L21/02118

TEMPORARY PASSIVATION LAYER ON A SUBSTRATE
20220359332 · 2022-11-10 ·

A substrate includes a metal component on a surface. A polymeric layer is deposited on the surface using molecular layer deposition. The polymeric layer includes a metalcone and has a thickness from 1 nm to 20 nm. The polymeric layer is stable at room temperature, but will undergo a structural change at high temperatures. The polymeric layer can be annealed to cause a structural change, which can occur during soldering.

Low-temperature passivation of ferroelectric integrated circuits for enhanced polarization performance

Curing of a passivation layer applied to the surface of a ferroelectric integrated circuit so as to enhance the polarization characteristics of the ferroelectric structures. A passivation layer, such as a polyimide, is applied to the surface of the ferroelectric integrated circuit after fabrication of the active devices. The passivation layer is cured by exposure to a high temperature, below the Curie temperature of the ferroelectric material, for a short duration such as on the order of ten minutes. Variable frequency microwave energy may be used to effect such curing. The cured passivation layer attains a tensile stress state, and as a result imparts a compressive stress upon the underlying ferroelectric material. Polarization may be further enhanced by polarizing the ferroelectric material prior to the cure process.

Ozone for selective hydrophilic surface treatment

Processes for surface treatment of a workpiece are provided. In one example implementation, a method can include placing the workpiece on a workpiece support in a processing chamber. The method can include admitting a process gas into the processing chamber. The process gas can include an ozone gas. The method can include exposing the silicon nitride layer and the low-k dielectric layer to the process gas to modify a surface wetting angle of the silicon nitride layer.

Semiconductor device and method for manufacturing the same

A semiconductor device including a substrate, an insulating layer on the substrate and including a trench, at least one via structure penetrating the substrate and protruding above a bottom surface of the trench, and a conductive structure surrounding the at least one via structure in the trench may be provided.

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
20230102166 · 2023-03-30 ·

A method of manufacturing a semiconductor device includes forming a protective layer over a substrate. The hydrophilicity of the protective layer is reduced. A resist layer is formed over the protective layer, and the resist layer is patterned.

SELECTIVE DEPOSITION OF ORGANIC MATERIAL

The present disclosure relates to methods and apparatuses for the manufacture of semiconductor devices. More particularly, the disclosure relates to methods and apparatuses for depositing an organic layer selectively on a substrate comprising at least two different surfaces. The process comprises providing a substrate in a reaction chamber, providing a first vapor-phase precursor in the reaction chamber, and providing a second vapor-phase precursor in the reaction chamber. In the method, the first and second vapor-phase precursors form the organic material selectively on the first surface relative to the second surface, and the first vapor-phase precursor comprises a diamine compound comprising at least five carbon atoms and the amine groups being attached to non-adjacent carbon atoms.

TREATMENT OF SPIN ON ORGANIC MATERIAL TO IMPROVE WET RESISTANCE
20230099053 · 2023-03-30 ·

The present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, portions of an adhesion layer, barrier layer and/or seed layer is protected by a layer of an organic mask material as portions of the adhesion layer, barrier layer and/or seed layer are removed. The layer of organic mask material is modified to improve its resistance to penetration by wet etchants used to remove exposed portions of the adhesion layer, barrier layer and/or seed layer. An example modification includes treating the layer of organic mask material with a surfactant that is absorbed into the layer of organic mask material.

Apparatus for substrate processing

A method of processing a substrate is provided. The substrate includes an etching target region and a patterned region. The patterned region is provided on the etching target region. In the method, an organic film is formed on a surface of the substrate. Subsequently, the etching target region is etched by plasma generated from a processing gas. The organic film is formed in a state that the substrate is placed in a processing space within a chamber. When the organic film is formed, a first gas containing a first organic compound is supplied toward the substrate, and then, a second gas containing a second organic compound is supplied toward the substrate. An organic compound constituting the organic film is generated by polymerization of the first organic compound and the second organic compound.

Methods and apparatus for digital material deposition onto semiconductor wafers

A microelectronic device is formed by dispensing discrete amounts of a mixture of photoresist resin and solvents from droplet-on-demand sites onto a wafer to form a first photoresist sublayer, while the wafer is at a first temperature which allows the photoresist resin to attain less than 10 percent thickness non-uniformity. The wafer moves under the droplet-on-demand sites in a first direction to form the first photoresist sublayer. A portion of the solvents in the first photoresist sublayer is removed. A second photoresist sublayer is formed on the first photoresist sublayer using the droplet-on-demand sites while the wafer is at a second temperature to attain less than 10 percent thickness non-uniformity in the combined first and second photoresist sublayers. The wafer moves under the droplet-on-demand sites in a second direction for the second photoresist sublayer, opposite from the first direction.

SEMICONDUCTOR DEVICE INCLUDING HARD MASK STRUCTURE

Provided is a semiconductor device. The semiconductor device includes a wafer; an etch stop layer on the wafer; a lower mold layer on the etch stop layer; an intermediate supporter layer on the lower mold layer; an upper mold layer on the intermediate supporter layer; an upper supporter layer on the upper mold layer; and a hard mask structure on the upper supporter layer, wherein the hard mask structure includes a first hard mask layer on the upper supporter layer and a second hard mask layer on the first hard mask layer, one of the first hard mask layer and the second hard mask layer includes a first organic layer including a SOH containing C, H, O, and N, and the other one of the first hard mask layer and the second hard mask layer includes a second organic layer including an SOH containing C, H, and O.