A patterning method includes at least the following steps. A first material layer is provided. A second material layer is provided over the first material layer. The second material layer partially exposes the first material layer. A passivation layer is formed over the first material layer and the second material layer. A growth rate of the passivation layer on the second material layer is greater than a growth rate of the passivation layer on the first material layer. A first etching process is performed to remove a portion of the passivation layer and a portion of the first material layer.

A method of processing a semiconductor wafer includes: forming a first metal layer or metal layer stack on a backside of the semiconductor wafer; forming a plating preventative layer on the first metal layer or metal layer stack, the plating preventative layer being formed at least over a kerf region of the semiconductor wafer and such that part of the first metal layer or metal layer stack is uncovered by the plating preventative layer, wherein the kerf region defines an area for dividing the semiconductor wafer along the kerf region into individual semiconductor dies; and plating a second metal layer or metal layer stack on the part of the first metal layer or metal layer stack uncovered by the plating preventative layer, wherein the plating preventative layer prevents plating of the second metal layer or metal layer stack over the kerf region.

Provided are a photosensitive resin composition in which warping of a cured film after curing is decreased and lithographic properties in a case of forming a pattern are excellent, a cured film, a laminate, a method for producing a cured film, and a semiconductor device. The photosensitive resin composition includes a polyimide precursor including a repeating unit including a biphenyl structure and a photopolymerization initiator having an oxime structure capable of generating an aryl radical by being irradiated with light.

Techniques herein include methods for forming a direct write, tunable stress film and methods for correcting wafer bow using said stress film. The method can be executed on a coater-developer tool or track-based tool. The stress film can be based on a film that undergoes crosslinking/decrosslinking under external stimulus where direct write is achieved by, but is not limited to, 365 nm exposure and subsequent cure is used to “pattern-in” stress. No develop step may be required, which provides additional significant benefit in conserving film planarity. An amount of bow (or internal stress to create or affect a bow signature) can be tuned with exposure dose, bake temperature, bake time and number of bakes.

Methods for selectively depositing on metallic surfaces are disclosed. Some embodiments of the disclosure utilize a hydrocarbon having at least two functional groups selected from alkene, alkyne, ketone, hydroxyl, aldehyde, or combinations thereof to form a self-assembled monolayer (SAM) on metallic surfaces.

A glass substrate is reused. The mass productivity of a semiconductor device is increased. A glass substrate one surface of which includes a first material and a second material. The first material includes one or both of a metal and a metal oxide. The second material includes one or both of a resin and a decomposition product of a resin. A cleaning method of a glass substrate, which includes a step of preparing the glass substrate one surface of which includes a first material and a second material and a step of exposing the first material by removing at least part of the second material.

A manufacturing method of a protective film agent for laser dicing that includes a solution preparation step of preparing a solution in which at least a water-soluble resin, an organic solvent, and an ultraviolet absorber are mixed; and an ion-exchange treatment step of carrying out ion exchange of sodium ions in the solution by using a cation-exchange resin.

In a method, a mask is formed on a microstructure over a substrate. The mask includes a first pattern over a first region of the microstructure and a second pattern over a second region of the microstructure. A first etching process is performed to etch the microstructure by providing an etching gas and applying a first bias voltage to the substrate according to the first and second patterns of the mask. A protective layer is subsequently formed by providing a deposition gas and applying a second bias voltage to the substrate to cover the first pattern of the mask. A second etching process is performed to transfer the second pattern of the mask further into the second region of the microstructure. The deposition gas has a higher carbon to fluorine ratio than the etching gas, and the second bias voltage is smaller than the first bias voltage.

A vertical capacitor structure includes a substrate, at least a pillar, a first conductive layer, a first dielectric layer and a second conductive layer. The substrate defines a cavity. The pillar is disposed in the cavity. The first conductive layer covers and is conformal to the cavity of the substrate and the pillar, and is insulated from the substrate. The first dielectric layer covers and is conformal to the first conductive layer. The second conductive layer covers and is conformal to the first dielectric layer. The first conductive layer, the first dielectric layer and the second conductive layer jointly form a capacitor component.

A self-assembled nanostructure comprises first domains and second domains. The first domains comprise a first block of a block copolymer material and an activatable catalyst. The second domains comprise a second block and substantially without the activatable catalyst. The activatable catalyst is capable of generating catalyst upon application of activation energy, and the generated catalyst is capable of reacting with a metal oxide precursor to provide a metal oxide. A semiconductor structure comprises such self-assembled nanostructure on a substrate.