An apparatus includes a vacuum chamber, a wafer transfer mechanism, a first gas source, a second gas source and a reuse gas pipe. The vacuum chamber is divided into at least three reaction regions including a first reaction region, a second reaction region and a third reaction region. The wafer transfer mechanism is structured to transfer a wafer from the first reaction region to the third reaction region via the second reaction region. The first gas source supplies a first gas to the first reaction region via a first gas pipe, and a second gas source supplies a second gas to the second reaction region via a second gas pipe. The reuse gas pipe is connected between the first reaction region and the third reaction region for supplying an unused first gas collected in the first reaction region to the third reaction region.

A composition and method for using the composition in the fabrication of an electronic device are disclosed. Compounds, compositions and methods for depositing a low dielectric constant (<4.0) and high oxygen ash resistance silicon-containing film such as, without limitation, a carbon doped silicon oxide, are disclosed.

A method for reducing effluent buildup in a pumping exhaust system of a substrate processing system includes, during a substrate treatment process, arranging a substrate on a substrate support in a processing chamber; supplying one or more process gases to the processing chamber; supplying an inert dilution gas at a first flow rate to the pumping exhaust system; performing the substrate treatment process on the substrate in the processing chamber; evacuating reactants from the processing chamber using the pumping exhaust system. The method includes, after the substrate treatment process, supplying cleaning plasma including cleaning gas in the processing chamber during a cleaning process; and supplying the inert dilution gas at a second flow rate that is less than the first flow rate to the pumping exhaust system during the cleaning process.

Methods of conformally doping three dimensional structures are discussed. Some embodiments utilize conformal silicon films deposited on the structures. The silicon films are doped after deposition to comprise halogen atoms. The structures are then annealed to dope the structures with halogen atoms from the doped silicon films.

Provided are a composition for depositing a silicon-containing thin film containing a bis(aminosilyl)alkylamine compound and a method for manufacturing a silicon-containing thin film using the same, and more particularly, a composition for depositing a silicon-containing thin film, containing the bis(aminosilyl)alkylamine compound capable of being usefully used as a precursor of the silicon-containing thin film, and a method for manufacturing a silicon-containing thin film using the same.

Exemplary processing systems may include a chamber body. The systems may include a pedestal configured to support a semiconductor substrate. The systems may include a faceplate. The chamber body, the pedestal, and the faceplate may define a processing region. The faceplate may be coupled with an RF power source. The systems may include a remote plasma unit. The remote plasma unit may be coupled at electrical ground. The systems may include a discharge tube extending from the remote plasma unit towards the faceplate. The discharge tube may define a central aperture. The discharge tube may be electrically coupled with each of the faceplate and the remote plasma unit. The discharge tube may include ferrite extending about the central aperture of the discharge tube.

A method for depositing III-V alloys on substrates and compositions therefrom. A first layer comprises a Group III element. A second layer comprises a silica. A substrate has a surface. The second layer is deposited onto a first layer. The depositing is performed by a sol-gel method. The second layer is exposed to a precursor that comprises a Group V element. At least one of the precursor or the Group V element diffuse through the silica. The first layer is transformed into a solid layer comprising a III-V alloy, wherein at least a portion of the first layer to a liquid. The silica retains the liquified first layer, enabling at least one of the precursor or the Group V element to diffuse into the liquid, resulting in the forming of the III-V alloy.

Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. Alternating layers of material may be formed on the substrate. One or more recesses may be formed in the alternating layers of material. The methods may include forming a first silicon-containing material. The first silicon-containing material may extend into the one or more recesses formed in the alternating layers of material. The methods may include providing a halogen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include forming a silicon-and-halogen-containing material. The silicon-and-halogen-containing material may overly the first silicon-containing material. The methods may include forming a second silicon-containing material. The second silicon-containing material may overly the silicon-and-halogen-containing material.

There is provided a technique that includes: forming a film containing Si, O and N or a film containing Si and O on a substrate by performing a cycle a predetermined number of times under a condition where SiCl.sub.4 is not gas-phase decomposed, the cycle including non-simultaneously performing: (a) forming NH termination on a surface of the substrate by supplying a first reactant containing N and H to the substrate; (b) forming a SiN layer having SiCl termination formed on its surface by supplying the SiCl.sub.4 as a precursor to the substrate to react the NH termination formed on the surface of the substrate with the SiCl.sub.4; and (c) reacting the SiN layer having the SiCl termination with a second reactant containing O by supplying the second reactant to the substrate

A non-volatile memory apparatus is provided and includes a substrate having a major surface extending longitudinally. A stack of first and second sets of word lines and insulating layers extends along and over the major surface longitudinally and alternating with and overlying one another vertically to define a device region. The first and second sets of word lines each respectively extends longitudinally beyond a first and second side of the device region a decreasing longitudinal distance from the device region as a vertical distance from the major surface increases to define first and second stepped contact regions. Word line contacts extend vertically in the first and second stepped contact regions. The second set of word lines in the first stepped contact region do not contact the word line contacts and the first set of word lines in the second stepped contact region do not contact the word line contacts.