H01L21/02208

Systems and methods for forming UV-cured low-κ dielectric films

Semiconductor processing methods are described for forming UV-treated, low-κ dielectric films. The methods may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-and-carbon-containing precursor. The methods may further include generating a deposition plasma from the deposition precursors within the substrate processing region, and depositing a silicon-and-carbon-containing material on the substrate from plasma effluents of the deposition plasma. The as-deposited silicon-and-carbon-containing material may be characterized by greater than or about 5% hydrocarbon groups. The methods may still further include exposing the deposited silicon-and-carbon-containing material to ultraviolet light. The exposed silicon-and-carbon-containing material may be characterized by less than or about 2% hydrocarbon groups.

PLASMA PROCESSING METHOD AND PLASMA PROCESSING APPARATUS

A plasma processing apparatus in the present disclosure includes a plasma processing chamber, a gas supply, a power supply, and a controller. The controller causes (a) forming a first film on side walls of an opening of a processing target using the plasma so that the first film has different thicknesses along a spacing between pairs of side walls facing each other, and (b) forming a second film by performing a film forming cycle one or more times after (a) so that the second film has different thicknesses along the spacing between the pairs of side walls facing each other.

Method of processing substrate, method of manufacturing semiconductor device, substrate processing apparatus, and recording medium

There is provided a technique that includes: forming a film containing Si, O and N or a film containing Si and O on a substrate by performing a cycle a predetermined number of times under a condition where SiCl.sub.4 is not gas-phase decomposed, the cycle including non-simultaneously performing: (a) forming NH termination on a surface of the substrate by supplying a first reactant containing N and H to the substrate; (b) forming a SiN layer having SiCl termination formed on its surface by supplying the SiCl.sub.4 as a precursor to the substrate to react the NH termination formed on the surface of the substrate with the SiCl.sub.4; and (c) reacting the SiN layer having the SiCl termination with a second reactant containing O by supplying the second reactant to the substrate.

Thin film forming method

A substrate processing method for filling a gap without seams or voids comprising: providing a substrate with a gap in a reaction chamber, pumping down the reaction chamber to a pressure at or below 5 Torr and filling the gap with a film by alternately and sequentially supplying a precursor, a reactant and a radio frequency electromagnetic radiation comprising a relatively high radio frequency component and a relatively low radio frequency component.

COMPOSITION AND METHODS USING SAME FOR CARBON DOPED SILICON CONTAINING FILMS

A composition and method for using the composition in the fabrication of an electronic device are disclosed. Compounds, compositions and methods for depositing a low dielectric constant (<4.0) and high oxygen ash resistance silicon-containing film such as, without limitation, a carbon doped silicon oxide, are disclosed.

Layer forming method and apparatus

There is provided a method and apparatus for forming a layer, by sequentially repeating a layer deposition cycle to process a substrate disposed in a reaction chamber. The deposition cycle comprising: supplying a first precursor into the reaction chamber for a first pulse period; supplying a second precursor into the reaction chamber for a second pulse period. At least one of the first and second precursors may be supplied into the reaction chamber for a pretreatment period longer than the first or second pulse period before sequentially repeating the deposition cycles.

Forming low-stress silicon nitride layer through hydrogen treatment

A method includes placing a wafer into a process chamber, and depositing a silicon nitride layer on a base layer of the wafer. The process of depositing the silicon nitride layer includes introducing a silicon-containing precursor into the process chamber, purging the silicon-containing precursor from the process chamber, introducing hydrogen radicals into the process chamber, purging the hydrogen radicals from the process chamber; introducing a nitrogen-containing precursor into the process chamber, and purging the nitrogen-containing precursor from the process chamber.

Forming Low-Stress Silicon Nitride Layer Through Hydrogen Treatment

A method includes placing a wafer into a process chamber, and depositing a silicon nitride layer on a base layer of the wafer. The process of depositing the silicon nitride layer includes introducing a silicon-containing precursor into the process chamber, purging the silicon-containing precursor from the process chamber, introducing hydrogen radicals into the process chamber, purging the hydrogen radicals from the process chamber; introducing a nitrogen-containing precursor into the process chamber, and purging the nitrogen-containing precursor from the process chamber.

Stress Modulation for Dielectric Layers

A method includes etching a first portion and a second portion of a dummy gate stack to form a first opening and a second opening, respectively, and depositing a silicon nitride layer to fill the first opening and the second opening. The deposition of the silicon nitride layer comprises a first process selected from treating the silicon nitride layer using hydrogen radicals, implanting the silicon nitride layer, and combinations thereof. The method further includes etching a third portion of the dummy gate stack to form a trench, etching a semiconductor fin underlying the third portion to extend the trench down into a bulk portion of a semiconductor substrate underlying the dummy gate stack, and depositing a second silicon nitride layer into the trench.

SEMICONDUCTOR DEVICE STRUCTURE WITH GATE SPACER

A semiconductor device structure is provided. The structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The structure also includes a sealing element extending along a sidewall of the gate stack. The sealing element has a first atomic layer and a second atomic layer, and the first atomic layer and the second atomic layer have different atomic concentrations of carbon. The structure further includes a spacer element over the sealing element.