A method includes forming a semiconductor capping layer over a first fin in a first region of a substrate, forming a dielectric layer over the semiconductor capping layer, and forming an insulation material over the dielectric layer, an upper surface of the insulation material extending further away from the substrate than an upper surface of the first fin. The method further incudes recessing the insulation material to expose a top portion of the first fin, and forming a gate structure over the top portion of the first fin.

A method for forming a semiconductor device structure is provided. The method includes providing a substrate. The method includes forming a gate structure over the substrate. The gate structure has a first sidewall. The method includes forming a spacer element over the first sidewall of the gate structure. The method includes forming a source/drain portion adjacent to the spacer element and the gate structure. The source/drain portion has a first top surface. The method includes depositing an etch stop layer over the first top surface of the source/drain portion. The etch stop layer is made of nitride. The method includes forming a dielectric layer over the etch stop layer. The dielectric layer has a second sidewall and a bottom surface, the etch stop layer is in direct contact with the bottom surface, and the spacer element is in direct contact with the second sidewall.

Embodiments of the present disclosure relate to the field of semiconductors, and provide a semiconductor structure and a forming method thereof. The forming method includes: providing a substrate; performing first oxidation on a part of the substrate to form a first dielectric layer; and performing second oxidation on a part of the substrate just under the first dielectric layer to form a second dielectric layer, where the first dielectric layer and the second dielectric layer form a dielectric layer on the substrate; and an oxidation rate of the first oxidation to a substrate material is less than that of the second oxidation to the substrate material.

Methods, apparatuses, and systems related to a semiconductor nitridation passivation are described. An example method includes performing a dry etch process on a semiconductor structure on a wafer in a semiconductor fabrication process. The method further includes performing a dry strip process on the semiconductor structure. The method further includes performing a first wet strip clean process on the semiconductor. The method further includes performing a second wet strip clean process on the semiconductor. The method further includes performing a nitridation passivation on the semiconductor structure to avoid oxidization of the semiconductor structure. The method further performing a spacer material deposition on the semiconductor structure.

Integrated chips and methods of forming the same include forming a lower conductive line over an underlying layer. An upper conductive via is formed over the lower conducting lines. An encapsulating layer is formed on the lower conductive line and the upper conductive via using a treatment process that converts an outermost layer of the lower conductive line and the upper conductive via into the encapsulating layer.

A mesa structure includes a substrate. A mesa protrudes out of the substrate. The mesa includes a slope and a top surface. The slope surrounds the top surface. A lattice damage area is disposed at inner side of the slope. The mesa can optionally further includes an insulating layer covering the lattice damage area. The insulating layer includes an oxide layer or a nitride layer.

Methods are provided to form pure silicon oxide layers on silicon-germanium (SiGe) layers, as well as an FET device having a pure silicon oxide interfacial layer of a metal gate structure formed on a SiGe channel layer of the FET device. For example, a method comprises growing a first silicon oxide layer on a surface of a SiGe layer using a first oxynitridation process, wherein the first silicon oxide layer comprises nitrogen. The first silicon oxide layer is removed, and a second silicon oxide layer is grown on the surface of the SiGe layer using a second oxynitridation process, which is substantially the same as the first oxynitridation process, wherein the second silicon oxide layer is substantially devoid of germanium oxide and nitrogen. For example, the first silicon oxide layer comprises a SiON layer and the second silicon oxide layer comprises a pure silicon dioxide layer.

Embodiments disclosed herein include methods of forming high quality silicon nitride films. In an embodiment, a method of depositing a film on a substrate may comprise forming a silicon nitride film over a surface of the substrate in a first processing volume with a deposition process, and treating the silicon nitride film in a second processing volume, wherein treating the silicon nitride film comprises exposing the film to a plasma induced by a modular high-frequency plasma source. In an embodiment, a sheath potential of the plasma is less than 100 V, and a power density of the high-frequency plasma source is approximately 5 W/cm.sup.2 or greater, approximately 10 W/cm.sup.2 or greater, or approximately 20 W/cm.sup.2 or greater.

A method of forming a semiconductor device and resulting structures having an etch-resistant interlayer dielectric (ILD) that maintains height during a top epitaxy clean by forming a dielectric layer on a semiconductor structure; wherein the dielectric layer includes a first dielectric material; converting at least a portion of the dielectric layer to a second dielectric material; and exposing the portion of the dielectric layer to an etch material; wherein the etch material includes a first etch characteristic defining a first rate at which the etch material etches the first dielectric material; and wherein the etch material further includes a second etch characteristic defining a second rate at which the etch material etches the portion of the dielectric layer; wherein the first rate is different than the second rate.

According to the present disclosure, there is provided a technique capable of repairing a damage due to a surface treatment of a metal material constituting a reaction vessel. According to one aspect of the technique of the present disclosure, there is provided a maintenance method including: (a) performing a substrate processing on a substrate arranged in a reaction vessel at a predetermined temperature by supplying a process gas to the substrate; and (b) performing an oxidation process of repairing a damage due to an alumite treatment on a surface of an aluminum material constituting at least a part of the reaction vessel at a temperature equal to or higher than the predetermined temperature by supplying an oxygen-containing gas into the reaction vessel in a state where there is no substrate in the reaction vessel.