A method of manufacturing a semiconductor structure includes: etching a substrate according to a hard mask to form a plurality of trenches in the substrate; performing a nitridation treatment on the trenches of the substrate; filling the trenches of the substrate with a flowable isolation material; and solidifying the flowable isolation material to form an isolation material. A semiconductor structure manufactured by the method is also provided.

Provided is a memory device including a substrate, a plurality of word-line structures, a plurality of cap structures, and a plurality of air gaps. The word-line structures are disposed on the substrate. The cap structures are respectively disposed on the word-line structures. A material of the cap structures includes a nitride. The nitride has a nitrogen concentration decreasing along a direction near to a corresponding word-line structure toward far away from the corresponding word-line structure. The air gaps are respectively disposed between the word-line structures. The air gaps are in direct contact with the word-line structures. A method of forming a memory device is also provided.

Horizontal gate-all-around devices and methods of manufacturing the same are described. The hGAA devices comprise an oxidize layer on a semiconductor material between source regions and drain regions of the device. The method includes radical plasma oxidation (RPO) of semiconductor material layers between source regions and drain regions of an electronic device.

A method for etching a dielectric layer covering a top and a flank of a three-dimensional structure, this method including a first etching of the dielectric layer, including a first fluorine based compound, a second compound taken from SiwCl(2w+2) and SiwF(2w+2), oxygen, this first etching being carried out to form a first protective layer on the top and form a second protective layer on the dielectric layer, a second etching configured to remove the second protective layer while retaining a portion of the first protective layer, the first and second etchings being repeated until removing the dielectric layer located on the flank of the structure. The second etching can be carried out by hydrogen-based plasma.

A method for forming a group III-V semiconductor channel region in a transistor is provided herein. The method includes exposing a substrate including an oxide layer to a first plasma to treat the oxide layer, exposing the treated oxide layer to a second plasma to convert the oxide layer to an evaporable layer, evaporating the evaporable layer to expose a group III-V semiconductor material surface, and exposing the group III-V semiconductor material surface to an oxygen containing gas to oxidize the group III-V semiconductor material. The processes may be repeated until a recessed depth having a predetermined depth is formed. A group III-V semiconductor channel is then formed in the predetermined recessed depth. The control of the height of the group III-V semiconductor channel is improved.

A method of forming a vertical fin field effect transistor device, including, forming one or more vertical fins with a hardmask cap on each vertical fin on a substrate, forming a fin liner on the one or more vertical fins and hardmask caps, forming a sacrificial liner on the fin liner, and forming a bottom spacer layer on the sacrificial liner.

A peeling method of one embodiment of the present invention includes a first step of forming a first insulating layer over a substrate; a second step of forming a second insulating layer over the first insulating layer; a third step of forming a peeling layer over the second insulating layer; a fourth step of performing plasma treatment on a surface of the peeling layer; a fifth step of forming a third insulating layer over the peeling layer; a sixth step of performing heat treatment; and a seventh step of separating the peeling layer and the third insulating layer from each other. The first insulating layer and the third insulating layer each have a function of blocking hydrogen and for example, include a silicon nitride film or the like. The second insulating layer has a function of releasing hydrogen by heating and for example, includes a silicon oxide film.

A method for forming a silicon nitride film to cover a stepped portion formed by exposed surfaces of first and second base films in a substrate, includes: forming a nitride film or a seed layer to cover the stepped portion, wherein the nitride film is formed by supplying, to the substrate, a nitrogen-containing base-film nitriding gas for nitriding the base films, exposing the substrate to plasma and nitriding the surface of the stepped portion, and the seed layer is composed of a silicon-containing film formed by supplying a raw material gas of silicon to the substrate and is configured such that the silicon nitride film uniformly grows on the surfaces of the base films; and forming the silicon nitride film on the seed layer by supplying, to the substrate, a second raw material gas of silicon and a silicon-nitriding gas for nitriding silicon.

Provided are: forming an oxycarbonitride film, an oxycarbide film or an oxide film on a substrate by alternately performing a specific number of times: forming a first layer containing the specific element, nitrogen and carbon, on the substrate, by alternately performing a specific number of times, supplying a first source containing the specific element and a halogen-group to the substrate in a processing chamber, and supplying a second source containing the specific element and an amino-group to the substrate in the processing chamber; and forming a second layer by oxidizing the first layer by supplying an oxygen-containing gas, and an oxygen-containing gas and a hydrogen-containing gas to the substrate in the processing chamber.

Various embodiments of the present application are directed to a method for forming a thin semiconductor-on-insulator (SOI) substrate without implantation radiation and/or plasma damage. In some embodiments, a device layer is epitaxially formed on a sacrificial substrate and an insulator layer is formed on the device layer. The insulator layer may, for example, be formed with a net charge that is negative or neutral. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates. The sacrificial substrate is removed, and the device layer is cyclically thinned until the device layer has a target thickness. Each thinning cycle comprises oxidizing a portion of the device layer and removing oxide resulting from the oxidizing.