A method of forming a semiconductor device structure is provided. The method includes forming semiconductor fins at a first conductivity type region and a second conductivity type region of a substrate, forming a sacrificial gate structure across a portion of the semiconductor fins, wherein the sacrificial gate structure comprises a sacrificial gate dielectric layer and a sacrificial gate electrode layer over the sacrificial gate dielectric layer, and the sacrificial gate dielectric layer on the semiconductor fins of the first conductivity type region is asymmetrical in thickness between a top and a sidewall of the semiconductor fins. The method also includes forming a gate spacer on opposite sidewalls of the sacrificial gate structure, recessing the semiconductor fins not covered by the sacrificial gate structure and the gate spacer, forming source/drain feature on the recessed semiconductor fins, and removing the sacrificial gate structure to expose the top of the semiconductor fins.

Methods for adjusting a work function of a structure in a substrate leverage near surface doping. In some embodiments, a method for adjusting a work function of a structure in a substrate may include growing an epitaxial layer on surfaces of the structure to form a homogeneous passivation region as part of a substrate material of the substrate and performing a dopant diffusion process to further embed the dopants into surfaces of the structure to adjust a work function of the structure, wherein the dopant diffusion process is performed at less than approximately 450 degrees Celsius.

The present disclosure describes a method for forming a nitrogen-rich protective layer within a low-k layer of a metallization layer to prevent damage to the low-k layer from subsequent processing operations. The method includes forming, on a substrate, a metallization layer having conductive structures in a low-k dielectric. The method further includes forming a capping layer on the conductive structures, where forming the capping layer includes exposing the metallization layer to a first plasma process to form a nitrogen-rich protective layer below a top surface of the low-k dielectric, releasing a precursor on the metallization layer to cover top surfaces of the conductive structures with precursor molecules, and treating the precursor molecules with a second plasma process to dissociate the precursor molecules and form the capping layer. Additionally, the method includes forming an etch stop layer to cover the capping layer and top surfaces of the low-k dielectric.

According to one aspect of the technique of the present disclosure, there is provided a substrate processing apparatus including: a process vessel in which a substrate is processed; an outer vessel configured to cover an outer circumference of the process vessel; a gas flow path provided between the outer vessel and the outer circumference of the process vessel; an exhaust path in communication with the gas flow path; an adjusting valve configured to be capable of adjusting a conductance of the exhaust path; a first exhaust apparatus provided on the exhaust path downstream of the adjusting valve; a pressure sensor configured to measure an inner pressure of the outer vessel; and a controller configured to be capable of adjusting an exhaust volume flow rate of the first exhaust apparatus by controlling the first exhaust apparatus based on a pressure measured by the pressure sensor.

The present disclosure provides a high electron mobility transistor including a channel layer; a barrier layer on the channel layer and configured to induce formation of a 2-dimensional electron gas (2DEG) to the channel layer; a p-type semiconductor layer on the barrier layer; a first passivation layer on the barrier layer and including a quaternary material of Al, Ga, O, and N; a gate electrode on the p-type semiconductor layer; and a source electrode and a drain electrode provided on both sides of the barrier layer and separated from the gate electrode.

The present disclosure appropriately shortens a processing step for processing a substrate in which a silicon layer and a silicon germanium layer are alternatively laminated. The present disclosure provides a substrate processing method of processing the substrate in which the silicon layer and the silicon germanium layer are alternatively laminated, which includes forming an oxide film by selectively modifying a surface layer of an exposed surface of the silicon germanium layer by using a processing gas including fluorine and oxygen and converted into plasma.

An apparatus includes: a processing container; a stage provided inside the processing container to place a substrate thereon; a gas supply mechanism for supplying a processing gas into the processing container; and at least three ultraviolet light sources provided to irradiate the processing gas inside the processing container with ultraviolet rays. The ultraviolet light sources are provided to be offset from a rotation axis of the stage in a plan view, and are arranged in a light source arrangement direction with distances from the ultraviolet light sources to the rotation axis being different from one another. The ultraviolet light sources include first to third ultraviolet light source. The third ultraviolet light source is arranged such that distances L1, L2, and L3 from the first to third ultraviolet light sources, respectively, to the rotation axis in a plan view satisfies a relationship of L1<L3<L2.

A plasma processing device member according to the disclosure includes a base material and a film formed of a rare-earth element oxide, or a rare-earth element fluoride, or a rare-earth element oxyfluoride, or a rare-earth element nitride, the film being disposed on at least part of the base material. The film includes a surface to be exposed to plasma, the surface having an arithmetic mean roughness Ra of 0.01 μm or more and 0.1 μm or less, the surface being provided with a plurality of pores, and a value obtained by subtracting an average equivalent circle diameter of the pores from an average distance between centroids of adjacent pores is 28 μm or more and 48 μm or less. A plasma processing device according to the disclosure includes the plasma processing device member described above.

A method for manufacturing a semiconductor device includes supplying a silicon-containing gas to a substrate having a recess formed in a surface of the substrate to deposit a silicon film in the recess, supplying, to the substrate, a first etching gas having a first etching profile in which an amount of etching for an upper portion of the recess in a depth direction and an amount of etching for a lower portion of the recess in the depth direction are different from each other, to etch the silicon film in the recess, supplying, to the substrate, a second etching gas having a second etching profile that is different from the first etching profile of the first etching gas to etch the silicon film in the recess, and additionally depositing the silicon film on the already deposited silicon film etched by the second etching gas.

A method of forming a high electron mobility transistor (HEMT) includes: providing a semiconductor structure comprising a channel layer and a barrier layer sequentially stacked on a substrate; forming a first insulating layer on the barrier layer; and forming a gate contact, a source contact, and a drain contact on the barrier layer. An interface between the first insulating layer and the barrier layer comprises a modified interface region on a drain access region and/or a source access region of the semiconductor structure such that a sheet resistance of the drain access region and/or the source access region is between 300 and 400 Ω/sq.