Thin AlN films are oxidatively treated in a plasma to form AlO and AlON films without causing damage to underlying layers of a partially fabricated semiconductor device (e.g., to underlying metal and/or dielectric layers). The resulting AlO and AlON films are characterized by improved leakage current compared to the AlN film and are suitable for use as etch stop layers. The oxidative treatment involves contacting the substrate having an exposed AlN layer with a plasma formed in a process gas comprising an oxygen-containing gas and a hydrogen-containing gas. In some implementations oxidative treatment is performed with a plasma formed in a process gas including CO.sub.2 as an oxygen-containing gas, H.sub.2 as a hydrogen-containing gas, and further including a diluent gas. The use of a hydrogen-containing gas in the plasma eliminates the oxidative damage to the underlying layers.

The present disclosure provides semiconductor devices, fin field-effect transistors and fabrication methods thereof. An exemplary fin field-effect transistor includes a semiconductor substrate; an insulation layer configured for inhibiting a short channel effect and increasing a heat dissipation efficiency of the fin field-effect transistor formed over the semiconductor substrate; at least one fin formed over the insulation layer; a gate structure crossing over at least one fin and covering top and side surfaces of the fin formed over the semiconductor substrate; and a source formed in the fin at one side of the gate structure and a drain formed in the fin at the other side of the gate structure.

Semiconductor devices and methods of forming semiconductor devices are described. A method of forming metal silicon nitride films is disclosed. Some embodiments of the disclosure provide a process using ammonia plasma for treating a metal silicide or metal film to form a metal silicon nitride film. The ammonia plasma treatment generates NH* radicals that diffuse through the metal silicide to form a metal silicon nitride film that is substantially free of silicon nitride (SiN). The metal silicon nitride films have improved resistance relative to films deposited by thermal processes or plasma processes with a nitrogen plasma exposure.

A method for preferential oxidation of silicon in substrates containing silicon (Si) and germanium (Ge) is described. According to one embodiment, the method includes providing a substrate containing Si and Ge, forming a plasma containing H.sub.2 gas and O.sub.2 gas, and exposing the substrate to the plasma to preferentially oxidize the Si relative to the Ge. The substrate may be further processed by removing the oxidized Si from the substrate.

A method of manufacturing a semiconductor device includes forming a film on a substrate by overlapping the following during at least a certain period: (a) supplying a first source to the substrate, the first source including at least one of an inorganic source containing a specific element and a halogen element and an organic source containing the specific element and the halogen element; (b) supplying a second source to the substrate, the second source including at least one of amine, organic hydrazine, and hydrogen nitride; and (c) supplying a third source to the substrate, the third source including at least one of amine, organic hydrazine, hydrogen nitride, and organic borane.

A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes forming an isolation layer on a substrate. The isolation layer includes an opening, and a bottom of the opening exposes the substrate. The method also includes forming a fin in the opening. The fin includes a heat-dissipation region and a channel region on the heat-dissipation region. Moreover, the fin includes forming an isolation structure by removing a thickness portion of the isolation layer. A surface of the isolation structure is coplanar with a surface of the heat-dissipation region of the fin. Further, the method includes forming a channel part from the channel region by performing a thinning process to reduce a width of the channel region of the fin using the isolation structure as a mask. The heat-dissipation region of the fin forms a heat-dissipation part.

A starting semiconductor structure includes a layer of filler material, a hard mask layer over the layer of filler material, and filler material lines over the hard mask layer. The starting semiconductor structure is placed in an etching chamber, and oxygen gas and high plasma power are inserted into the etching chamber and oxidizing, resulting in one or more of the filler material lines being oxidized, the filler material line(s) increasing in width from oxidizing, and etching the hard mask layer with a chemistry that is non-selective to the oxidized filler material lines and hard mask layer, and which has a stronger lateral etch selectivity to the oxidized filler material lines than the hard mask layer.

A component such as a display may have a substrate and thin-film circuitry on the substrate. The thin-film circuitry may be used to form an array of pixels for a display or other circuit structures. Metal traces may be formed among dielectric layers in the thin-film circuitry. Metal traces may be provided with insulating protective sidewall structures. The protective sidewall structures may be formed by treating exposed edge surfaces of the metal traces. A metal trace may have multiple layers such as a core metal layer sandwiched between barrier metal layers. The core metal layer may be formed from a metal that is subject to corrosion. The protective sidewall structures may help prevent corrosion in the core metal layer. Surface treatments such as oxidation, nitridation, and other processes may be used in forming the protective sidewall structures.

Various embodiments of the present application are directed towards a method for forming a metal-insulator-metal (MIM) capacitor comprising an enhanced interfacial layer to reduce breakdown failure. In some embodiments, a bottom electrode layer is deposited over a substrate. A native oxide layer is formed on a top surface of the bottom electrode layer and has a first adhesion strength with the top surface. A plasma treatment process is performed to replace the native oxide layer with an interfacial layer. The interfacial layer is conductive and has a second adhesion strength with the top surface of the bottom electrode layer, and the second adhesion strength is greater than the first adhesion strength. An insulator layer is deposited on the interfacial layer. A top electrode layer is deposited on the insulator layer. The top and bottom electrode layers, the insulator layer, and the interfacial layer are patterned to form a MIM capacitor.

A method of making a semiconductor arrangement includes forming a first layer of molecular ions in a first wafer interface region of a first wafer, forming a second layer of molecular ions in a second wafer interface region of a second wafer, forming a first molecular bond connecting the first wafer interface region to the second wafer interface region by applying pressure to at least one of the first wafer or the second wafer in a direction toward the first wafer interface region and the second wafer interface region, and annealing the first wafer and the second wafer to form a second molecular bond connecting the first wafer interface region to the second wafer interface region.