There is provided a technique that includes a first opening and a second opening which supply gases to a process chamber in which a substrate is arranged, and is configured such that: the first opening and the second opening are arranged in a direction parallel to a surface of the substrate, a gas supplied from the first opening is supplied toward a center of the substrate, a gas supplied from the second opening is supplied toward a peripheral edge of the substrate, and a direction of the gas supplied from the second opening forms a predetermined angle with respect to a direction of the gas supplied from the first opening.

Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include selectively depositing a self-assembled monolayer (SAM) on the bottom of the gap. The SAM comprises a hydrocarbon having a formula of H—C≡C—R, wherein R is a linear alkyl chain or aryl group comprising from 1 to 20 carbon atoms or a formula of R′C═CR″, wherein R′ and R″ independently include a linear alkyl chain or aryl group comprising from 1 to 20 carbon atoms A barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer.

A semiconductor device and method of manufacture are provided. In embodiments a first liner is deposited to line a recess between a first semiconductor fin and a second semiconductor fin, the first liner comprising a first material. The first liner is annealed to transform the first material to a second material. A second liner is deposited to line the recess, the second liner comprising a third material. The second liner is annealed to transform the third material to a fourth material.

A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.

A method of area selective deposition for cap layer formation in advanced semiconductor contacts. The method includes providing a planarized substrate including a first dielectric layer and a first metal layer, oxidizing a surface of the first metal layer to form an oxidized metal layer, and selectively depositing a second dielectric layer on the oxidized metal layer. The selectively depositing the second dielectric layer can include moving the planarized substrate below a gas inlet dispensing a deposition gas during a spatial vapor phase deposition process, where the deposition gas is preferentially exposed to the oxidized metal layer extending above a surface of the first dielectric layer.

A deposition method includes forming a nitride film on a surface of a substrate; and performing, after the depositing, plasma purging supplying a noble gas activated as a plasma. The forming of the nitride film includes a) forming adsorption inhibitors on the surface of the substrate, by supplying a chlorine gas activated by a plasma and by causing the activated chlorine gas to be adsorbed on the surface of the substrate; b) causing a raw material gas, containing silicon and chlorine or a metal and chlorine, to be adsorbed on a region in the surface of the substrate on which the adsorption inhibitors are not present, by supplying the raw material gas on the surface of the substrate; and c) depositing the nitride film on the surface of the substrate, by supplying a nitriding gas to cause the raw material gas to be reacted with the nitriding gas.

In embodiments, an optoelectronic device comprises a substrate formed of magnesium oxide, and a multi-region stack epitaxially deposited upon the substrate. The multi-region stack may comprise a non-polar crystalline material structure along a growth direction, or may comprise a crystal polarity having an oxygen-polar crystal structure or a metal-polar crystal structure along the growth direction. In some cases, at least one region of the multi-region stack is a bulk semiconductor material comprising Mg.sub.(x)Zn.sub.(1-x)O. In some cases, at least one region of the multi-region stack is a superlattice comprising MgO and Mg.sub.(x)Zn.sub.(1-x)O.

An apparatus for semiconductor processing is provided. The apparatus includes a housing comprising a plurality of shelves configured to receive a plurality of substrates; a shelter plate disposed over an upper side of the housing and configured to reduce heat loss of an upper substrate of the plurality of substrates; and an airflow structure in the housing and configured to control an air circulation in the housing.

An integrated capacitor on a semiconductor surface on a substrate includes a capacitor dielectric layer including at least one silicon compound material layer on a bottom plate. The capacitor dielectric layer includes a pitted sloped dielectric sidewall. Each of the pits is at least partially filled by one of a plurality of noncontiguous dielectric portions. A conformal dielectric layer may be formed over the noncontiguous dielectric portions. A top metal layer provides a top plate of the capacitor.

A metal plate to be used in the manufacture of a deposition mask comprises: a base metal plate; and a surface layer disposed on the base metal plate, wherein the surface layer includes elements different from those of the base metal plate, or has a composition ratio different from that of the base metal plate, and an etching rate of the base metal plate is greater than the etching rate of the surface layer. An embodiment includes a manufacturing method for a deposition mask having an etching factor greater than or equal to 2.5. The deposition mask of the embodiment includes a deposition pattern region and a non-deposition region, the deposition pattern region includes a plurality of through-holes, the deposition pattern region is divided into an effective region, a peripheral region, and a non-effective region, and through-holes can be formed in the effective region and the peripheral region.