A method for manufacturing a semiconductor device, the method including forming a fin type pattern including a lower pattern and an upper pattern on a substrate, the upper pattern including a plurality of sacrificial layers and a plurality of sheet patterns alternately stacked on the lower pattern; forming a field insulating film on the substrate and the fin type pattern such that the field insulation film covers side walls of the lower pattern; forming a passivation film on the field insulating film such that the passivation film extends along an upper surface of the field insulating film; and removing the plurality of sacrificial layers after forming the passivation film.

In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.

A device includes a substrate, a gate structure over the substrate, gate spacers on opposite sidewalls of the gate structure, source/drain structures over the substrate and on opposite sides of the gate structure, and a self-assemble monolayer (SAM) in contact with an inner sidewall of one of the gate spacer and in contact with a top surface of the gate structure.

A method of producing an inorganic solid pattern is described that includes: a step of coating an inorganic solid with a composition containing a polymetalloxane and an organic solvent; a step of heating the coating film obtained in the coating step, at a temperature of 100° C. or more and 1000° C. or less to form a heat-treated film; a step of forming a pattern of the heat-treated film; and a step of patterning the inorganic solid by etching using the pattern of the heat-treated film as a mask.

To provide a photosensitive composition capable of easily forming a cured film having a low refractive index. The present invention provides a photosensitive siloxane composition comprising: a polysiloxane, a photosensitive agent, hollow silica particles, and a solvent. The hollow silica particles contain voids inside, and have outer surfaces subjected to hydrophobic treatment.

A hardmask-forming compound, a hardmask composition, and a method of manufacturing an integrated circuit (IC), the hardmask-forming compound including a moiety represented by Formula 1:

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Removing a stimuli responsive polymer (SRP) from a substrate includes controlled degradation. In certain embodiments of the methods described herein, removing SRPs includes exposure to two reactants that react to form an acid or base that can trigger the degradation of the SRP. The exposure occurs sequentially to provide more precise top down control. In some embodiments, the methods involve diffusing a compound, or a reactant that reacts to form a compound, only to a top portion of the SRP. The top portion is then degraded and removed, leaving the remaining SRP intact. The exposure and removal cycles are repeated.

A substrate intermediary body includes: a substrate having a hole in a thickness direction, and a conductor being disposed in the hole; and an adhesion layer formed on a wall surface of the hole. The adhesion layer contains a reaction product of a polymer (A) having a cationic functional group and having a weight-average molecular weight of from 2,000 to 1,000,000 and a polyvalent carboxylic acid compound (B) having two or more carboxyl groups per molecule or a derivative thereof.

A composition contains an organic solvent and compound (formula (1)), theoretical molecular weight 999 or less. (Z1 contains a nitrogen-containing heterocyclic ring; U represents a monovalent organic group (formula (2)); and p represents 2 to 4.) (In formula (2), R1 represents an alkylene group having 1 to 4 carbon atoms; A1 to A3 represent a hydrogen atom, or methyl or ethyl group: X represents —COO—, —OCO—, —O—, —S— or —NRa-; Ra represents a hydrogen atom or methyl group; Y represents a direct bond or optionally substituted alkylene group having 1 to 4 carbon atoms; R2, R3 and R4 represent a hydrogen atom or optionally substituted alkyl group having 1 to 10 carbon atoms or aryl group having 6 to 40 carbon atoms; R5 represents a hydrogen atom or hydroxy group; n represents 0 or 1; m1 and m2 represent 0 or 1; and * represents a binding site to Z1.)

A cryogenic electronic package includes at least two superconducting and/or conventional metal semiconductor structures. Each of the semiconductor structures includes a substrate and a superconducting trace. Additionally, each of the semiconductor structures includes a passivation layer and one or more under bump metal (UBM) structures. The cryogenic electronic package also includes one or more superconducting and/or conventional metal interconnect structures disposed between selected ones of the at least two superconducting semiconductor structures. The interconnect structures are electrically coupled to respective ones of the UBM structures of the semiconductor structures to form one or more electrical connections between the semiconductor structures. A method of fabricating a cryogenic electronic package is also provided.