Techniques are disclosed for methods and apparatus for performing plasma enhanced atomic layer deposition (PEALD) as well as plasma enhanced chemical vapor deposition (PECVD) in a single hybrid design and without requiring any mechanical intervention. Depending on the configuration/activation of an electrically controlled RF switch, in the PEALD mode, plasma is created by an ICP source above a grounded metal plate in the chamber. Alternatively, in the PECVD mode, the metal plate itself is RF-powered and produces the plasma around the substrate and below an underlying ceramic plate. Electrical isolation of the metal plate is preferably provided by a ceramic ring spacer. A stack of PEALD/PECVD films may thus be obtained by the present hybrid design in a single recipe. In certain aspects, an RF-bias is provided to the heated platen holding the substrate for better stress management of the PECVD layers. Atomic layer etching (ALE) can also be achieved in the same reactor for cleaning the surface deposited PEALD film followed by depositing a thick PECVD film.

Described herein is a technique capable of selectively forming a film in a film-forming step. According to one aspect of the technique, there is provided a method of manufacturing a semiconductor device including: (a) selectively forming a film on a substrate by supplying a process gas into a process chamber accommodating the substrate, wherein an inhibitor layer is formed on a portion of the substrate such that the substrate acquires a selectivity in an adsorption of the process gas; (b) supplying a cleaning gas containing a component contained in the inhibitor layer into the process chamber accommodating no substrate; and (c) removing a residual component of the cleaning gas in the process chamber.

A substrate processing method includes providing a substrate containing a metal surface and a dielectric material surface, selectively forming a sacrificial capping layer containing a self-assembled monolayer on the metal surface, removing the sacrificial capping layer to restore the metal surface, and processing the restored metal surface and the dielectric material surface. The sacrificial capping layer may be used to prevent metal diffusion into the dielectric material and to prevent oxidation and contamination of the metal surface while waiting for further processing of the substrate.

A method includes forming a first gate structure over a substrate, where the first gate structure is surrounded by a first dielectric layer; and forming a mask structure over the first gate structure and over the first dielectric layer, where forming the mask structure includes selectively forming a first capping layer over an upper surface of the first gate structure; and forming a second dielectric layer around the first capping layer. The method further includes forming a patterned dielectric layer over the mask structure, the patterned dielectric layer exposing a portion of the mask structure; removing the exposed portion of the mask structure and a portion of the first dielectric layer underlying the exposed portion of the mask structure, thereby forming a recess exposing a source/drain region adjacent to the first gate structure; and filling the recess with a conductive material.

Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include removing a native oxide from a surface of a substrate. The methods may include delivering nitrous oxide to the substrate and thermally annealing the surface to form an oxide-containing interface. The methods may include delivering a nitrogen-containing precursor or an oxygen-containing precursor to a substrate contained in a semiconductor processing chamber. The methods may include forming reactive ligands on an exposed surface of the substrate with the nitrogen-containing precursor or the oxygen-containing precursor. The methods may also include forming a high-k dielectric material overlying the substrate.

Methods for forming an interconnections structure on a substrate in a cluster processing system and thermal processing such interconnections structure are provided. In one embodiment, a method for a device structure for semiconductor devices includes forming a barrier layer in an opening formed in a material layer disposed on a substrate, forming an interface layer on the barrier layer, forming a gap filling layer on the interface layer, and performing an annealing process on the substrate, wherein the annealing process is performed at a pressure range greater than 5 bar.

A method of forming a diffusion barrier layer on a dielectric or semiconductor substrate by a wet process. The method includes the steps of treating the dielectric or semiconductor substrate with an aqueous pretreatment solution comprising one or more adsorption promoting ingredients capable of preparing the substrate for deposition of the diffusion barrier layer thereon; and contacting the treated dielectric or semiconductor substrate with a deposition solution comprising manganese compounds and an inorganic pH buffer (optionally, with one or more doping metals) to the diffusion barrier layer thereon, wherein the diffusion barrier layer comprises manganese oxide. Also included is a two-part kit for treating a dielectric or semiconductor substrate to form a diffusion barrier layer thereon.

A method to integrate silicon-oxide-nitride-oxide-silicon (SONOS) transistors into a complementary metal-oxide-semiconductor (CMOS) flow including a triple gate oxide structure. The memory device may include a non-volatile memory (NVM) transistor that has a charge-trapping layer and a blocking dielectric, a first field-effect transistor (FET) including a first gate oxide of a first thickness, a second FET including a second gate oxide of a second thickness, a third FET including a third gate oxide of a third thickness, in which the first thickness is greater than the second thickness and the second thickness is greater than the third thickness.

Methods are provided for selective film deposition. One method includes providing a substrate containing a dielectric material and a metal layer, the metal layer having an oxidized metal layer thereon, coating the substrate with a metal-containing catalyst layer, treating the substrate with an alcohol solution that removes the oxidized metal layer from the metal layer along with the metal-containing catalyst layer on the oxidized metal layer, and exposing the substrate to a process gas containing a silanol gas for a time period that selectively deposits a SiO.sub.2 film on the metal-containing catalyst layer on the dielectric material.

Methods of improved selectively for SAM-based selective depositions are described. Some of the methods include forming a SAM on a second surface and a carbonized layer on the first surface. The substrate is exposed to an oxygenating agent to remove the carbonized layer from the first surface, and a film is deposited on the first surface over the protected second surface. Some of the methods include overdosing a SAM molecule to form a SAM layer and SAM agglomerates, depositing a film, removing the agglomerates, reforming the SAM layer and redepositing the film.