H01L21/024

Template-Assisted Synthesis of 2D Nanosheets Using Nanoparticle Templates
20180186653 · 2018-07-05 ·

A template-assisted method for the synthesis of 2D nanosheets comprises growing a 2D material on the surface of a nanoparticle substrate that acts as a template for nanosheet growth. The 2D nanosheets may then be released from the template surface, e.g. via chemical intercalation and exfoliation, purified, and the templates may be reused.

Epitaxial growth using atmospheric plasma preparation steps
09909232 · 2018-03-06 · ·

After CMP and before an epitaxial growth step, the substrate is prepared by an atmospheric plasma which includes not only a reducing chemistry, but also metastable states of a chemically inert carrier gas. This removes residues, oxides, and/or contaminants. Optionally, nitrogen passivation is also performed under atmospheric conditions, to passivate the substrate surface for later epitaxial growth.

Optimized heteroepitaxial growth of semiconductors

A method of performing HVPE heteroepitaxy comprises exposing a substrate to a carrier gas, a first precursor gas, a Group II/III element, and ternary-forming gasses (V/VI group precursor), to form a heteroepitaxial growth of a binary, ternary, and/or quaternary compound on the substrate; wherein the carrier gas is H.sub.2, wherein the first precursor gas is HCl, the Group II/III element comprises at least one of Zn, Cd, Hg, Al, Ga, and In; and wherein the ternary-forming gasses comprise at least two or more of AsH.sub.3 (arsine), PH.sub.3 (phosphine), H.sub.2Se (hydrogen selenide), H.sub.2Te (hydrogen telluride), SbH.sub.3 (hydrogen antimonide, or antimony tri-hydride, or stibine), H.sub.2S (hydrogen sulfide), NH.sub.3 (ammonia), and HF (hydrogen fluoride); flowing the carrier gas over the Group II/III element; exposing the substrate to the ternary-forming gasses in a predetermined ratio of first ternary-forming gas to second ternary-forming gas (1tf:2tf ratio); and changing the 1tf:2tf ratio over time.

Methods of forming SOI substrates

Methods of forming SOI substrates are disclosed. In some embodiments, an epitaxial layer and an oxide layer are formed on a sacrificial substrate. An etch stop layer is formed in the epitaxial layer. The sacrificial substrate is bonded to a handle substrate at the oxide layer. The sacrificial substrate is removed. The epitaxial layer is partially removed until the etch stop layer is exposed.

Highly luminescent semiconductor nanocrystals

A method of making a semiconductor nanocrystal can include contacting an M-containing compound with an X donor having the formula X(Y(R).sub.3).sub.3, where X is a group V element and Y is a group IV element.

Method for fabricating a semiconductor structure

Method for fabricating a semiconductor structure. The method includes: providing a crystalline silicon substrate; defining an opening in a dielectric layer on the crystalline silicon substrate, the opening having sidewalls and a bottom wherein the bottom corresponds to a surface of the crystalline silicon substrate; providing a confinement structure above the dielectric layer, thereby forming a confinement region between the confinement structure and the dielectric layer; and growing a crystalline compound semiconductor material in the confinement region thereby at least partially filling the confinement region. The present invention also provides an improved compound semiconductor structure and a device for fabricating such semiconductor structure.

Epitaxial Growth Using Atmospheric Plasma Preparation Steps
20170051431 · 2017-02-23 · ·

After CMP and before an epitaxial growth step, the substrate is prepared by an atmospheric plasma which includes not only a reducing chemistry, but also metastable states of a chemically inert carrier gas. This removes residues, oxides, and/or contaminants. Optionally, nitrogen passivation is also performed under atmospheric conditions, to passivate the substrate surface for later epitaxial growth.

METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE

Method for fabricating a semiconductor structure. The semiconductor structure includes: a crystalline silicon substrate; a dielectric layer on the crystalline silicon substrate, the opening having an opening with sidewalls and a bottom wherein the bottom corresponds to a surface of the crystalline silicon substrate; and a crystalline compound semiconductor layer thereby forming a processable crystalline compound semiconductor substrate, wherein the bottom of the opening is isolated from the crystalline compound material.

Seed layer, a heterostructure comprising the seed layer and a method of forming a layer of material using the seed layer

A seed layer for inducing nucleation to form a layer of material is described. In an embodiment, the seed layer comprising a layer of two-dimensional monolayer amorphous material having a disordered atomic structure adapted to create localised electronic states to form electric potential wells for bonding adatoms to a surface of the seed layer via van der Waals interaction to form the layer of material, wherein each of the electric potential wells has a potential energy larger in magnitude than surrounding thermal energy to capture adatoms on the surface of the seed layer. Embodiments in relation to a method for forming the seed layer, a heterostructure comprising the seed layer, a method for forming the heterostructure comprising the seed layer, a device comprising the heterostructure and a method of enhancing vdW interaction between adatoms and a surface of the seed layer are also described.