A method for producing a microelectronic device is provided, including forming on an insulating layer of a semi-conductor on insulator type substrate, a first semi-conductor block covered with a first strain zone configured to induce a compressive strain in the first block and a second semi-conductor block covered with a second strain zone configured to induce a tensile strain in the second block, the first block and the second block each being formed of a lower region based on amorphous semi-conductor material, covered with an upper region of crystalline semi-conductor material in contact with one of the strain zones; and recrystallizing the lower region of the first and second blocks while using the upper region of crystalline material as starting zone for a recrystallization front.

A display device may include a thin film transistor disposed on a substrate, and a display element electrically connected to the thin film transistor. The thin film transistor may include an active pattern including polycrystalline silicon, a gate insulation layer disposed on the active pattern, and a gate electrode disposed on the gate insulation layer. An average value of grain sizes of the active pattern may be in a range of about 400 nm to about 800 nm. An RMS value of a surface roughness of the active pattern may be about 4 nm or less. A method of manufacturing a polycrystalline silicon layer may include cleaning an amorphous silicon layer with hydrofluoric acid, rinsing the amorphous silicon layer with hydrogenated deionized water, and irradiating the amorphous silicon layer with a laser beam having an energy density of about 440 mJ/cm.sup.2 to about 490 mJ/cm.sup.2.

The present disclosure relates to a device and a system for testing flatness. The device for testing flatness includes a base, a testing platform, and a ranging sensor. The testing platform is assembled on the base. The testing platform includes a supporting structure. The supporting structure is disposed on the side of the testing platform away from the base and is used to support a to-be-tested board. The structure matches the structure of the to-be-tested board. The ranging sensor is disposed on the side of the testing platform away from the base. After the to-be-tested board is placed on the testing platform, the ranging sensor is used to test distances between a number N of to-be-tested positions on the to-be-tested board and the ranging sensor, to obtain N pieces of distance information, and the N pieces of distance information are used to determine the flatness of the to-be-tested board, where N is an integer greater than 2. According to the embodiments of the present disclosure, the flatness of the glass substrate can be tested to improve the manufacturing process to reduce the flatness of the glass substrate, and avoid the problem that the glass substrate is easily broken when entering the subsequent process equipment and the process equipment is down.

Described herein are devices and methods for facet suppression in spalling of (100) GaAs by redirecting the fracture front along features created by buried nanoimprint lithography (NIL)-patterned SiO.sub.2. Successful facet suppression using patterns that result in favorable fracture along the SiO.sub.2/GaAs interface and/or through voids formed above the pattern in the coalesced layer is provided. These results allow for the design of patterns that would successfully interrupt the fracture front and suppress faceting that, combined with growth optimization, define a path forward for this technology to be used as a way to reduce the need for repreparation of the (100) GaAs substrate surface after spalling.

A device for coating semiconductor/semiconductor precursor particles on a flexible substrate and a preparation method of a semiconducting thin film, wherein the device includes: a container for a first and second solvent substantially immiscible; injection means for injecting a predetermined dispersion volume of at least one layered semiconductor particle material or its precursor(s), occurring at a liquid-liquid interface formed within the container and between the first and second solvent, and creating a particle film at the liquid-liquid interface; a first support means; substrate extracting means; substrate supply means; compression means, reducing a distance between particles and push the film onto the substrate, wherein the compression means includes several pushing means mounted on a drive device, wherein at least two of the several pushing means are at least partially submerged in the second solvent during drive device rotation, and moved through the second solvent toward the first support means.

The present disclosure provides a manufacturing method of a complementary metal-oxide-semiconductor (CMOS) inverter includes annealing a substrate printed with an oxide ink to obtain a first active layer, printing a carbon tube ink between a first source and the first drain to form a second active layer for obtaining a first thin-film transistor (TFT), forming a second source and a second drain on two sides of the first active layer to obtain a second TFT, and forming wires between the first TFT and the second TFT.

The present invention relates to a method for preparing a nanosheet including the steps of: depositing a solution onto a substrate to form a first layer, wherein the substrate is rotatable relative to the depositing solution; depositing and condensing target material onto the first layer to form a second layer; and separating the second layer from the first layer and the substrate to form a nanosheet. Also disclosed a multilayer structure including: a substrate; a first layer arranged to deposit onto the substrate, wherein the substrate is rotatable relative to the depositing of the first layer; and a second layer arranged to deposit onto the first layer and separable from the first layer to form a nanosheet.

To provide a laser annealing apparatus which is high efficiency of irradiation energy and capable of achieving uniformity in density of irradiation energy in a region irradiated with a laser beam.

SOLVING MEANS

Scheduled treatment regions of a treatment film are each defined in the form of a strip extending in a scanning direction. Irradiation surface areas of line beams are oriented to be inclined relative to the scanning direction within respective scheduled treatment regions.

A method for producing a transition metal dichalcogenide-graphene heterojunction composite, the method includes: transferring a graphene onto a flexible substrate; depositing a transition metal layer on the flexible substrate onto which the graphene has been transferred; and injecting a gas containing plasma-treated sulfur (S) onto the flexible substrate onto which the transition metal layer has been deposited, is disclosed.

Methods for selective deposition are provided. Material is selectively deposited on a first surface of a substrate relative to a second surface of a different material composition. An inhibitor, such as a polyimide layer, is selectively formed from vapor phase reactants on the first surface relative to the second surface. A layer of interest is selectively deposited from vapor phase reactants on the second surface relative to the first surface. The first surface can be metallic while the second surface is dielectric. Accordingly, material, such as a dielectric transition metal oxides and nitrides, can be selectively deposited on metallic surfaces relative dielectric surfaces using techniques described herein.