A method of manufacturing a semiconductor device includes steps of (i) forming a buffer layer of an insulating material on a substrate, (ii) forming a seed layer of catalyst material containing Ni on the buffer layer, (iii) forming, on the buffer layer, an amorphous intrinsic silicon layer for forming a channel, (iv) forming, on the amorphous intrinsic silicon layer, a non-intrinsic silicon layer for forming a source and/or drain, (v) forming a metal layer on the non-intrinsic silicon layer, and (vi) performing metal induced crystallization (MIC) process for crystallization of the amorphous intrinsic silicon layer and the amorphous non-intrinsic silicon layer, and activation of the amorphous non-intrinsic silicon layer to form a conductive area.

A method for forming sequencing flow cells can include providing a semiconductor wafer covered with a dielectric layer and forming a patterned layer on the dielectric layer. The patterned layer has a differential surface that includes alternating first surface regions and second surface regions. The method can also include attaching a cover wafer to the semiconductor wafer to form a composite wafer structure including a plurality of flow cells. The composite wafer structure can then be singulated to form a plurality of dies. Each die forms a sequencing flow cell. The sequencing flow cell can include a flow channel between a portion of the patterned layer and a portion of the cover wafer, an inlet, and an outlet. Further, the method can include functionalizing the sequencing flow cell to create differential surfaces.

The present disclosure is directed to a method for forming metal insulator metal decoupling capacitors with scalable capacitance. The method can include forming a first redistribution layer with metal lines on a portion of a polymer layer, depositing a photoresist layer on the first redistribution layer, and etching the photoresist layer to form spaced apart first and second TIV openings in the photoresist layer, where the first TIV opening is wider than the second TIV opening. The method can further include depositing a metal in the first and second TIV openings to form respective first and second TIV structures in contact with the metal line, removing the photoresist layer, forming a high-k dielectric on a top surface of the first and second TIV structures, and depositing a metal layer on the high-k dielectric layer to form respective first and second capacitors.

Disclosed herein are compositions and methods for making polycrystalline thin films having very large grains sizes and exhibiting improved properties over existing thin films.

A method of producing a semiconductor component includes: providing a silicon-based substrate; depositing an oxide layer on the silicon-based substrate; depositing a polycrystalline silicon layer on the oxide layer and simultaneously a crystalline silicon layer on the silicon-based substrate; producing an electronic component based on the polycrystalline silicon layer; and mounting a glass- or silicon-based lid on the crystalline silicon layer.

A method of preparing crystalline graphene includes performing a first thermal treatment including supplying heat to an inorganic substrate in a reactor, introducing a vapor carbon supply source into the reactor during the first thermal treatment to form activated carbon, and binding of the activated carbon on the inorganic substrate to grow the crystalline graphene.

A semiconductor device and method for fabricating same is disclosed. Embodiments are directed to a semiconductor device and fabrication of same which include a flexible substrate and a buffer stack overlying the substrate. The buffer stack comprises at least one epitaxial buffer layer. An epitaxial doped layer comprised predominantly of silicon overlies the at least one epitaxial buffer layer. Mobility of the device is greater than 100 cm.sup.2/Vs and carrier concentration of the epitaxial doped layer is less than 10.sup.16 cm.sup.−3.

A method for forming sequencing flow cells can include providing a semiconductor wafer covered with a dielectric layer, and forming a patterned layer on the dielectric layer. The patterned layer has a differential surface that includes alternating first surface regions and second surface regions. The method can also include attaching a cover wafer to the semiconductor wafer to form a composite wafer structure including a plurality of flow cells. The composite wafer structure can then be singulated to form a plurality of dies. Each die forms a sequencing flow cell. The sequencing flow cell can include a flow channel between a portion of the patterned layer and a portion of the cover wafer, an inlet, and an outlet. Further, the method can include functionalizing the sequencing flow cell to create differential surfaces.

In certain examples, methods and semiconductor structures are directed to multilayered structures including TMD (transition metal dichalcogenide material or TMD-like material and a polymer-based layer which is characterized as exhibiting flexibility. A first layer including a TMD-based material (e.g., an atomic-thick layer including TMD) or TMD-like material is provided or grown on a surface which in certain instances may be a rigid platform or substrate. A plurality of electrodes are provided on or as part of the first layer, and another layer or film including polymer is applied to cover the first layer and the electrodes. The other layer is integrated with the TMD material or TMD-like material and the first layer, and the other layer provides a flexible substrate such as when released from the exemplary rigid platform or substrate.

A laser annealing device includes a stage, a laser generator, and a reflective member. The stage supports a substrate with a thin film formed thereon to be processed, and may be moved in a first direction at a set or predetermined speed. The laser generator irradiates a first area of the thin film with a laser beam while the stage is moved. The reflective member reflects a part of the laser beam, which is reflected from the first area of the thin film, to a second area of the thin film. The first area and the second area are spaced apart from each other.