Embodiments of a glass wafer for semiconductor fabrication processes are described herein. In some embodiments, a glass wafer includes: a glass substrate comprising: a top surface, a bottom surface opposing the top surface, and an edge surface between the top surface and the bottom surface; a first coating disposed atop the glass substrate, wherein the first coating is a doped crystalline silicon coating having a sheet-resistance of 100 to 1,000,000 ohm per square; and a second coating having one or more layers disposed atop the glass substrate, wherein the second coating comprises a silicon containing coating, wherein the glass wafer has an average transmittance (T) of less than 50% over an entire wavelength range of 400 nm to 1000 nm.

A single crystal semiconductor structure includes: an amorphous substrate; a single crystal semiconductor layer provided on the amorphous substrate; and a thin orienting film provided between the amorphous substrate and the single crystal semiconductor layer, wherein the thin orienting film is a single crystal thin film, and the thin orienting film has a non-zero thickness that is equal to or less than 10 times a critical thickness h.sub.c.

The present invention discloses a metal oxide (MO) semiconductor, which is implemented by respectively doping at least an oxide of rare earth element R and an oxide of rare earth element R′ into an indium-containing MO semiconductor to form an In.sub.xM.sub.yR.sub.nR′.sub.mO.sub.z semiconductor. According to the present invention, the extremely high oxygen bond breaking energy in the oxide of rare earth element R is used to effectively control the carrier concentration in the semiconductor, and a charge transportation center can be formed by using the characteristic that the radius of rare earth ions is equivalent to the radius of indium ions, so that the electrical stability of the semiconductor is improved. The present invention further provides a thin-film transistor based on the MO semiconductor and application thereof.

A semiconductor device includes a substrate and an oxide semiconductor TFT supported by the substrate. The oxide semiconductor TFT includes an oxide semiconductor layer containing In, Ga, and Zn, a gate electrode, a gate insulating layer formed between the gate electrode and the oxide semiconductor layer, and a source electrode and a drain electrode that are in contact with the oxide semiconductor layer. The oxide semiconductor layer has a layered structure that includes a first layer, a second layer, and an intermediate transition layer disposed between the first layer and the second layer, and the first layer is disposed closer to the gate insulating layer side than the second layer. The first layer and the second layer have different compositions, and the intermediate transition layer has a continuously changing composition from the first layer side toward the second layer side.

An electric field drives nanocrystals dispersed in solvents to assemble into ordered three-dimensional superlattices. A first electrode and a second electrode 214 are in the vessel. The electrodes face each other. A fluid containing charged nanocrystals fills the vessel between the electrodes. The electrodes are connected to a voltage supply which produces an electrical field between the electrodes. The nanocrystals will migrate toward one of the electrodes and accumulate on the electrode producing ordered nanocrystal accumulation that will provide a superlattice thin film, isolated superlattice islands, or coalesced superlattice islands.

The present invention relates to a method for separating at least one solid-body layer (4) from at least one solid body (1). Thereby, the method as claimed in the invention comprises the steps: creating a plurality of modifications (9) by means of laser beams within the interior space of the solid body (1) to form a detachment plane (8), producing a composite structure by arranging or producing layers and/or components (150) on or above an initially exposed surface (5) of the solid body (1), wherein the exposed surface (5) is an integral part of the solid-body layer (4) to be separated, introducing an external force into the solid body (1) for generating tensions within the solid body (1), wherein the external force is so strong that the tensions initialize a crack propagation along the detachment plane (8), wherein the modifications for forming the detachment plane (8) are created before producing the composite structure.

The subject disclosure relates to high mobility complementary metal-oxide-semiconductor (CMOS) devices and techniques for forming the CMOS devices with fins formed directly on the insulator. According to an embodiment, a method for forming such a high mobility CMOS device can comprise forming, via a first epitaxial growth of a first material, first pillars within first trenches formed within a dielectric layer, wherein the dielectric layer is formed on a silicon substrate, and wherein the first pillars comprise first portions with defects and second portions without the defects. The method can further comprise forming second trenches within a first region of the dielectric layer, and further forming second pillars within the second trenches via a second epitaxial growth of one or more second materials using the second portions of the first pillars as seeds for the second epitaxial growth.

A semiconductor structure and a manufacturing method therefor are provided by embodiments of the present application. A buffer layer is disposed on a substrate layer, and the buffer layer includes a first buffer layer and a second buffer layer. By doping a transition metal in the first buffer layer, a deep level trap may be formed to capture background electrons, and diffusion of free electrons toward the substrate may also be avoided. In the second buffer layer, by decreasing a doping concentration of the transition metal or not doping intentionally the transition metal, a tailing effect is avoided and current collapse is prevented. By doping periodically C in the buffer layer, C may be as an acceptor impurity to compensate the background electrons, and then a concentration of the background electrons is reduced.

A semiconductor structure and a manufacturing method therefor are provided by embodiments of the present application. A buffer layer is disposed on a substrate layer, and the buffer layer includes a first buffer layer and a second buffer layer. By doping a transition metal in the first buffer layer, a deep level trap may be formed to capture background electrons, and diffusion of free electrons toward the substrate may also be avoided. In the second buffer layer, by decreasing a doping concentration of the transition metal or not doping intentionally the transition metal, a tailing effect is avoided and current collapse is prevented. By doping periodically C in the buffer layer, C may be as an acceptor impurity to compensate the background electrons, and then a concentration of the background electrons is reduced.

A thin-film transistor is disclosed. The thin-film transistor includes an oxide semiconductor layer disposed on a substrate, a gate electrode disposed so as to overlap at least a portion of the oxide semiconductor layer and isolated from the oxide semiconductor layer, a source electrode connected to the oxide semiconductor layer, and a drain electrode connected to the oxide semiconductor layer and spaced apart from the source electrode, wherein the oxide semiconductor layer includes a first sub layer disposed on the substrate, a second sub layer disposed on the first sub layer, and a third sub layer disposed on the second sub layer, the second sub layer has larger resistance than the first sub layer and the third sub layer and lower carrier concentration than the first sub layer and the third sub layer, the first sub layer has higher hydrogen concentration than the second sub layer and the third sub layer, and each of the first sub layer and the second sub layer has crystallinity.