Patent classifications
H01L21/02425
Methods of improving graphene deposition for processes using microwave surface-wave plasma on dielectric materials
A method of forming graphene layers is disclosed. A method of improving graphene deposition is also disclosed. Some methods are advantageously performed at lower temperatures. Some methods advantageously provide graphene layers with lower resistance. Some methods advantageously provide graphene layers in a relatively short period of time.
Diamond Semiconductor System And Method
Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The method may include the steps of selecting a diamond semiconductor material having a surface, exposing the surface to a source gas in an etching chamber, forming a carbide interface contact layer on the surface; and forming a metal layer on the interface layer.
ELECTRONIC DEVICE, DISPLAY UNIT, AND ELECTRONIC APPARATUS
An electronic device includes a substrate, a barrier film, and one of an electrically-conductive layer and a semiconductor layer. The barrier film is provided on the substrate. The barrier film contains an inorganic polymer compound and an organic matter. One of the electrically-conductive layer and the semiconductor layer is provided on the substrate with the barrier film in between.
Method of forming a buffer layer in a solar cell, and a solar cell formed by the method
A method of fabricating a buffer layer of a photovoltaic device comprises: providing a substrate having a back contact layer disposed above the substrate and an absorber layer disposed above the back contact layer; depositing a metal layer on the absorber layer; and performing a thermal treatment on the deposited metal layer in an atmosphere comprising sulfur, selenium or oxygen, to form a buffer layer.
Method of intercalating insulating layer between metal and graphene layer and method of fabricating semiconductor device using the intercalation method
A method includes growing a graphene layer on a metal layer, intercalating a first material between the metal layer and the graphene layer by heating the first material at a first pressure and a first temperature, and intercalating a second material between the metal layer and the graphene layer by heating the second material at a second pressure different from the first pressure and a second temperature different from the first temperature. Accordingly, the first material and the second material are chemically bonded to each other to form an insulating layer, and the insulating layer may be between the metal layer and the graphene layer.
Barrier guided growth of microstructured and nanostructured graphene and graphite
Methods for growing microstructured and nanostructured graphene by growing the microstructured and nanostructured graphene from the bottom-up directly in the desired pattern are provided. The graphene structures can be grown via chemical vapor deposition (CVD) on substrates that are partially covered by a patterned graphene growth barrier which guides the growth of the graphene.
GROUP III NITRIDE SEMICONDUCTOR, AND METHOD FOR PRODUCING SAME
On an RAMO.sub.4 substrate containing a single crystal represented by the general formula RAMO.sub.4 (wherein R represents one or a plurality of trivalent elements selected from a group of elements including: Sc, In, Y, and a lanthanoid element, A represents one or a plurality of trivalent elements selected from a group of elements including: Fe(III), Ga, and Al, and M represents one or a plurality of divalent elements selected from a group of elements including: Mg, Mn, Fe(II), Co, Cu, Zn, and Cd), a buffer layer containing a nitride of In and a Group III element except for In is formed, and a Group III nitride crystal is formed on the buffer layer.
Method of manufacturing oxide semiconductor
A method of manufacturing an oxide semiconductor, includes impregnating a substrate in a solution containing a metal precursor and hydroxyl ions, and forming a metal oxide on the substrate by applying a voltage to the solution. The solution includes a surfactant, and the direction of crystal growth of the metal oxide is controllable based on the surfactant.
SIC OHMIC CONTACT PREPARATION METHOD
A SiC ohmic contact preparation method is provided and includes: selecting a SiC substrate; preparing a graphene/SiC structure by forming a graphene on a Si-face of the SiC substrate; depositing an Au film on the graphene of the graphene/SiC structure; forming a first transfer electrode pattern on the Au film by a first photolithography; etching the Au film uncovered by the first transfer electrode pattern through a wet etching; etching the graphene uncovered by the Au film through a plasma etching after the wet etching; forming a second transfer electrode pattern on the SiC substrate by a second photolithography; depositing an Au material on the Au film exposed by the second transfer electrode pattern and forming an Au electrode and then annealing. The graphene reduces potential barrier associated with the SiC interface, specific contact resistance of ohmic contact reaches the order of 10.sup.−7˜10.sup.−8 Ω.Math.cm.sup.2, and the method has high repeatability.
Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon
A method is disclosed for making semiconductor films from a eutectic alloy comprising a metal and a semiconductor. Through heterogeneous nucleation said film is deposited at a deposition temperature on relatively inexpensive buffered substrates, such as glass. Specifically said film is vapor deposited at a fixed temperature in said deposition temperature where said deposition temperature is above a eutectic temperature of said eutectic alloy and below a temperature at which the substrate softens. Such films could have widespread application in photovoltaic and display technologies.