Provided is a α-Ga.sub.2O.sub.3 based semiconductor film which is a semiconductor film in a circular shape having a crystal having a corundum-type crystal structure composed of α-Ga.sub.2O.sub.3 or an α-Ga.sub.2O.sub.3 solid solution as a main phase. The maximum value θ.sub.max and the minimum value θ.sub.min for off-angles at the center point X and four outer circumferential points A, B, C, and D of a surface of the semiconductor film satisfy the relationship of θ.sub.max-θ.sub.min≤0.30°. The off-angle is defined as an inclination angle θ of a crystal axis oriented in the substantially normal direction of the semiconductor film with respect to the film surface normal of the semiconductor film.

A method for producing a gallium oxide semiconductor film by a mist CVD method, including, a mist-forming step in which a raw material solution containing gallium is misted in a mist-forming unit to generate mist, a carrier gas supply step of supplying a carrier gas for transferring the mist to the mist-forming unit, a transferring step of transferring the mist from the mist-forming unit to a film forming chamber using the carrier gas via a supply pipe connecting the mist-forming unit and the film forming chamber, a rectification step of rectifying flow of the mist and the carrier gas supplied to a surface of a substrate in the film forming chamber so as to flow along the surface of the substrate, a film forming step of heat-treating the rectified mist to form a film on the substrate, and an exhaust step of exhausting waste gas upward from the substrate.

Provided is a crystalline oxide film including: a plane tilted from a c-plane as a principal plane; gallium; and a metal in Group 9 of the periodic table, the metal in Group 9 of the periodic table among all metallic elements in the film having an atomic ratio of equal to or less than 23%.

A transistor including a channel layer including an oxide semiconductor material and methods of making the same. The transistor includes a channel layer having a first oxide semiconductor layer having a first oxygen concentration, a second oxide semiconductor layer having a second oxygen concentration and a third oxide semiconductor layer having a third oxygen concentration. The second oxide semiconductor layer is located between the first semiconductor oxide layer and the third oxide semiconductor layer. The second oxygen concentration is lower than the first oxygen concentration and the third oxygen concentration.

A method for making a three-dimensional semiconductor structure includes: providing a substrate, forming a first insulating layer on the substrate, and defining at least one channel hole in the first insulating layer; forming a first epitaxial layer in each channel hole and forming a second epitaxial layer stacked on the first epitaxial layer; forming a sacrificial layer on the first insulating layer and exposing the second epitaxial layer relative to the sacrificial layer, forming another first epitaxial layer on the second epitaxial layer; forming a second insulating layer on the sacrificial layer, and forming another second epitaxial layer stacking on the another first epitaxial layer; repeating to form a plurality of sacrificial layers and a plurality of second insulating layers alternately stacked on the first insulating layer, and repeating to form a plurality of first epitaxial layers and a plurality of second epitaxial layers alternately stacked on the substrate.

A semiconductor laminate at least including: a base; a buffer layer; and a crystalline metal oxide semiconductor film containing at least one metal element and having a corundum structure, the semiconductor laminate having the buffer layer on a main surface of the base directly or via another layer, the semiconductor laminate having the crystalline metal oxide semiconductor film on the buffer layer. The buffer layer is a laminate structure of a plurality of buffer films each with a different composition, and at least two buffer films of the plurality of buffer films have a film thickness of 200 nm or more and 650 nm or less.

Favorable electrical characteristics are provided to a semiconductor device, or a semiconductor device with high reliability is provided.

A semiconductor device including a bottom-gate transistor with a metal oxide in a semiconductor layer includes a source region, a drain region, a first region, a second region, and a third region. The first region, the second region, and the third region are each sandwiched between the source region and the drain region along the channel length direction. The second region is sandwiched between the first region and the third region along the channel width direction, the first region and the third region each include the end portion of the metal oxide, and the length of the second region along the channel length direction is shorter than the length of the first region or the length of the third region along the channel length direction.

Provided is a method for manufacturing a semiconductor device whose electric characteristics are prevented from being varied and whose reliability is improved. In the method, an insulating film is formed over an oxide semiconductor film, a buffer film is formed over the insulating film, oxygen is added to the buffer film and the insulating film, a conductive film is formed over the buffer film to which oxygen is added, and an impurity element is added to the oxide semiconductor film using the conductive film as a mask. An insulating film containing hydrogen and overlapping with the oxide semiconductor film may be formed after the impurity element is added to the oxide semiconductor film.

A transistor and method of making the same, the method including: forming a seed layer on a first dielectric layer, the seed layer including a crystalline metal oxide semiconductor material; depositing an amorphous silicon layer on the seed layer; annealing the amorphous silicon layer to form a single-crystal silicon (c-Si) layer; patterning the seed layer and the c-Si layer to form a hybrid channel layer; forming a gate dielectric layer on the hybrid channel layer; forming a gate electrode on the gate dielectric layer; and forming source and drain electrodes that respectively electrically contact a source region and a drain region of the hybrid channel layer.

An optoelectronic semiconductor light emitting device configured to emit light having a wavelength in the range from about 150 nm to about 425 nm is disclosed. In embodiments, the device comprises a substrate having at least one epitaxial semiconductor layer disposed thereon, wherein each of the one or more epitaxial semiconductor layers comprises a metal oxide. Also disclosed is an optoelectronic semiconductor device for generating light of a predetermined wavelength comprising a substrate and an optical emission region. The optical emission region has an optical emission region band structure configured for generating light of the predetermined wavelength and comprises one or more epitaxial metal oxide layers supported by the substrate.