Semiconductor structures and methods for crystalline junctionless transistors used in nonvolatile memory arrays are introduced. Various embodiments in accordance with this disclosure provide a method of fabricating a monolithic 3D cross-bar nonvolatile memory array with low thermal budget. The method incorporates crystalline junctionless transistors into nonvolatile memory structures by transferring a layer of doped crystalline semiconductor material from a seed wafer to form the source, drain, and connecting channel of the junctionless transistor.

Materials containing picocrystalline quantum dots that form artificial atoms are disclosed. The picocrystalline quantum dots (in the form of born icosahedra with a nearly-symmetrical nuclear configuration) can replace corner silicon atoms in a structure that demonstrates both short range and long-range order as determined by x-ray diffraction of actual samples. A novel class of boron-rich compositions that self-assemble from boron, silicon, hydrogen and, optionally, oxygen is also disclosed. The preferred stoichiometric range for the compositions is (B.sub.12H.sub.w).sub.xSi.sub.yO.sub.z with 3≤w≤5, 2≤x≤4, 2≤y≤5 and 0≤z≤3. By varying oxygen content and the presence or absence of a significant impurity such as gold, unique electrical devices can be constructed that improve upon and are compatible with current semiconductor technology.

Graphene is deposited on a metal surface of a substrate using a remote hydrogen plasma chemical vapor deposition technique. The graphene may be deposited at temperatures below 400 C, which is suitable for semiconductor processing applications. Hydrogen radicals are generated in a remote plasma source located upstream of a reaction chamber, and hydrocarbon precursors are flowed into the reaction chamber downstream from the remote plasma source. The hydrocarbon precursors are activated by the hydrogen radicals under conditions to deposit graphene on the metal surface of the substrate in the reaction chamber.

A method of forming a structure having a coating layer includes the following steps: providing a substrate; coating a fluid on the surface of the substrate, where the fluid includes a carrier and a plurality of silicon-containing nanoparticles; and performing a heating process to remove the carrier and convert the silicon-containing nanoparticles into a silicon-containing layer, a silicide layer, or a stack layer including the silicide layer and the silicon-containing layer.

Exemplary methods of semiconductor processing may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include forming a layer of graphene on a substrate positioned within the processing region of the semiconductor processing chamber. The substrate may be maintained at a temperature below or about 600° C. The methods may include halting flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor.

Methods for DRAM device with a buried word line are described. The method includes forming a metal cap layer and a molybdenum conductor layer in a feature on a substrate. The method includes depositing the metal cap layer on the substrate by physical vapor deposition (PVD) and depositing the molybdenum conductor layer by atomic layer deposition (ALD) on the metal cap layer.

An electric field drives nanocrystals dispersed in solvents to assemble into ordered three-dimensional superlattices. A first electrode and a second electrode 214 are in the vessel. The electrodes face each other. A fluid containing charged nanocrystals fills the vessel between the electrodes. The electrodes are connected to a voltage supply which produces an electrical field between the electrodes. The nanocrystals will migrate toward one of the electrodes and accumulate on the electrode producing ordered nanocrystal accumulation that will provide a superlattice thin film, isolated superlattice islands, or coalesced superlattice islands.

A method of making nanoparticles including a semiconducting nitride is provided. The method includes reacting precursors in a gas phase to form the nanoparticles including the semiconducting nitride. The precursors include at least one of a gallium (Ga) precursor or an indium (In) precursor and a nitrogen (N) precursor. The semiconducting nitride is In.sub.1−xGa.sub.xN, where 0≤x≤1. Structures that include the nanoparticles and systems for making the nanoparticles are also provided.

Systems and methods are described herein to include an epitaxial metal layer between a rare earth oxide and a semiconductor layer. Systems and methods are described to grow a layered structure, comprising a substrate, a first rare earth oxide layer epitaxially grown over the substrate, a first metal layer epitaxially grown over the rare earth oxide layer, and a first semiconductor layer epitaxially grown over the first metal layer. Specifically, the substrate may include a porous portion, which is usually aligned with the metal layer, with or without a rare earth oxide layer in between.

A method of forming a doped silicon nitride film on a surface of a substrate and structures including the doped silicon nitride film are disclosed. Exemplary methods include forming a layer comprising silicon nitride using a first thermal process and forming a layer comprising doped silicon nitride using a second thermal process to thereby form the doped silicon nitride film.