A method for manufacturing a large-area thin film solar cell includes the steps of: (a) forming a first contact layer on a substrate; (b) forming a multi-layer metal precursor film on the first contact layer, which includes the sub-steps of (b1) sputtering a first multinary metal precursor layer on the first contact layer, the first multinary metal precursor layer containing Cu, Ga and KF, and (b2) sputtering an In-containing precursor layer on the first multinary metal precursor layer; and (c) subjecting the multi-layer metal precursor film to selenization to form an absorber layer having a chalcopyrite phase.

A method for fabricating thin-film optoelectronic devices (100), the method comprising: providing a alkali-nondiffusing substrate (110), forming a back-contact layer (120); forming at least one absorber layer (130) made of an ABC chalcogenide material, adding least one and advantageously at least two different alkali metals, and forming at least one front-contact layer (150) wherein one of said alkali metals comprise Rb and/or Cs and where, following forming said front-contact layer, in the interval of layers (470) from back-contact layer (120), exclusive, to front-contact layer (150), inclusive, the comprised amounts resulting from adding alkali metals are, for Rb and/or Cs, in the range of 500 to 10000 ppm and, for the other alkali metals, typically Na or K, in the range of 5 to 2000 ppm and at most ½ and at least 1/2000 of the comprised amount of Rb and/or Cs. The method (200) is advantageous for more environmentally-friendly production of photovoltaic devices on flexible substrates with high photovoltaic conversion efficiency and faster production rate.

A method to fabricate thin-film photovoltaic devices including a photovoltaic Cu(In,Ga)Se.sub.2 or equivalent ABC absorber layer, such as an ABC.sub.2 layer, deposited onto a back-contact layer characterized in that the method includes at least five deposition steps, during which the pair of third and fourth steps are sequentially repeatable, in the presence of at least one C element over one or more steps. In the first step at least one B element is deposited, followed in the second by deposition of A and B elements at a deposition rate ratio A.sub.r/B.sub.r, in the third at a ratio A.sub.r/B.sub.r lower than the previous, in the fourth at a ratio A.sub.r/B.sub.r higher than the previous, and in the fifth depositing only B elements to achieve a final ratio A/B of total deposited elements.

Embodiments of the invention provide a method of forming a group III-V material utilized in thin film transistor devices. In one embodiment, a gallium arsenide based (GaAs) layer with or without dopants formed from a solution based precursor may be utilized in thin film transistor devices. The gallium arsenide based (GaAs) layer formed from the solution based precursor may be incorporated in thin film transistor devices to improve device performance and device speed. In one embodiment, a thin film transistor structure includes a gate insulator layer disposed on a substrate, a GaAs based layer disposed over the gate insulator layer, and a source-drain metal electrode layer disposed adjacent to the GaAs based layer.

A method for manufacturing a CZTS based thin film having a dual band gap slope, comprising the steps of: forming a Cu.sub.2ZnSnS.sub.4 thin film layer; forming a Cu.sub.2ZnSn(S,Se).sub.4 thin film layer; and forming a Cu.sub.2ZnSnS.sub.4 thin film layer. A method for manufacturing a CZTS based solar cell having a dual band gap slope according to another aspect of the present invention comprises the steps of: forming a back contact; and forming a CZTS based thin film layer on the back contact by the method described above.

Methods of making a semiconductor layer from nanocrystals are disclosed. A film of nanocrystals capped with a ligand can be deposited onto a substrate; and the nanocrystals can be irradiated with one or more pulses of light. The pulsed light can be used to substantially remove the ligands from the nanocrystals and leave the nanocrystals unsintered or sintered, thereby providing a semiconductor layer. Layered structures comprising these semiconductor layers with an electrode are also disclosed. Devices comprising such layered structures are also disclosed.

A method (200) for fabricating patterns on the surface of a layer of a device (100), the method comprising: providing at least one layer (130, 230); adding at least one alkali metal (235); controlling the temperature (2300) of the at least one layer, thereby forming a plurality of self-assembled, regularly spaced, parallel lines of alkali compound embossings (1300, 1305) at the surface of the layer. The method further comprises forming cavities (236, 1300) by dissolving the alkali compound embossings. The method (200) is advantageous for nanopatterning of devices (100) without using templates and for the production of high efficiency optoelectronic thin-film devices (100).

A method is provided that includes forming a vertical bit line disposed in a first direction above a substrate, forming a multi-layer word line disposed in a second direction above the substrate, the second direction perpendicular to the first direction, and forming a memory cell including a nonvolatile memory material at an intersection of the vertical bit line and the multi-layer word line. The multi-layer word line includes a first conductive material layer and a second conductive material layer disposed above the first conductive material layer. The memory cell includes a working cell area encompassed by an intersection of the first conductive material layer and the nonvolatile memory material.

A method of manufacturing an oxide semiconductor, includes impregnating a substrate in a solution containing a metal precursor and hydroxyl ions, and forming a metal oxide on the substrate by applying a voltage to the solution. The solution includes a surfactant, and the direction of crystal growth of the metal oxide is controllable based on the surfactant.

A stacked structure includes: an insulating substrate; a graphene film that is formed on the insulating substrate; and a protective film that is formed on the graphene film and is made of a transition metal oxide, which is, for example, Cr.sub.2O.sub.3. Thereby, at the time of transfer of the graphene, polymeric materials such as a resist are prevented from directly coming into contact with the graphene and nonessential carrier doping on the graphene caused by a polymeric residue of the resist is suppressed.