Methods of doping a semiconductor film are provided. The methods comprise epitaxially growing the III-V semiconductor film in the presence of a dopant, a surfactant capable of acting as an electron reservoir, and hydrogen, under conditions that promote the formation of a III-V semiconductor film doped with the p-type dopant. In some embodiments of the methods, the epitaxial growth of the doped III-V semiconductor film is initiated at a first hydrogen partial pressure which is increased to a second hydrogen partial pressure during the epitaxial growth process.

Implementations described herein generally relate to methods for relaxing strain in thin semiconductor films grown on another semiconductor substrate that has a different lattice constant. Strain relaxation typically involves forming a strain relaxed buffer layer on the semiconductor substrate for further growth of another semiconductor material on top. Whereas conventionally formed buffer layers are often thick, rough and/or defective, the strain relaxed buffer layers formed using the implementations described herein demonstrate improved surface morphology with minimal defects.

One aspect of the disclosure relates to a method of forming a semiconductor structure. The method may include: forming a set of openings within a substrate; forming an insulator layer within each opening in the set of openings; recessing the substrate between adjacent openings containing the insulator layer in the set of openings to form a set of insulator pillars on the substrate; forming sigma cavities within the recessed substrate between adjacent insulator pillars in the set of insulator pillars; and filling the sigma cavities with a semiconductor material over the recessed substrate between adjacent insulator pillars.

Disclosed is a method of manufacturing a semiconductor-based wafer for reducing misfit dislocation. The method includes steps of depositing a basis buffer layer of aluminum nitride (AlN) on a substrate; forming an AlN sublayer of a composite buffer layer on the basis buffer layer by supplying pulses of reactants for AlN for a first total pulse time period; forming an gallium nitride (GaN) sublayer of the composite buffer layer on the AlN sublayer by supplying pulses of reactants for GaN for a second total pulse time period; and growing additional composite buffer layers along a growth direction from the substrate to the composite buffer layers, by repeating steps of forming the AlN sublayer and forming the GaN sublayer. The first total pulse time period for each AlN sublayer decreases among the composite buffer layers along the growth direction.

A method includes placing a wafer into a production chamber, providing a heating source to heat the wafer, and projecting a laser beam on the wafer using a laser projector. The method further includes, when the wafer is heated by both of the heating source and the laser beam, performing a process selected from an epitaxy process to grow a semiconductor layer on the wafer, and an etching process to etch the semiconductor layer.

A stack including a silicon oxide layer, a germanium-containing layer, and a III-V compound semiconductor layer is formed over a substrate. An alternating stack of insulating layers and spacer material layers is formed over the III-V compound semiconductor layer. The spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers. Memory openings are formed through the alternating stack and into the III-V compound semiconductor layer. Memory opening fill structures including a memory film and a vertical semiconductor channel are formed in the memory openings. The vertical semiconductor channels can include a III-V compound semiconductor channel material that is electrically connected to the III-V compound semiconductor layer. The substrate and at least a portion of the silicon oxide layer can be subsequently detached.

Printable inks based on a 2D semiconductor, such as MoS2, and its applications in fully inkjet-printed optoelectronic devices are disclosed. Specifically, percolating films of MoS2 nanosheets with superlative electrical conductivity (10-2 s m-1) are achieved by tailoring the ink formulation and curing conditions. Based on an ethyl cellulose dispersant, the MoS2 nanosheet ink also offers exceptional viscosity tunability, colloidal stability, and printability on both rigid and flexible substrates. Two distinct classes of photodetectors are fabricated based on the substrate and post-print curing method. While thermal annealing of printed devices on rigid glass substrates leads to a fast photoresponse of 150 μs, photonically annealed devices on flexible polyimide substrates possess high photoresponsivity exceeding 50 mA/W. The photonically annealed photodetector also significantly reduces the curing time down to the millisecond-scale and maintains functionality over 500 bending cycles, thus providing a direct pathway to roll-to-roll manufacturing of next-generation flexible optoelectronics.

A semiconductor substrate includes a first silicon substrate, an oxide layer, a second silicon substrate, and an epitaxial layer. The oxide layer is disposed on the first silicon substrate. The second silicon substrate is disposed on the oxide layer. The second silicon substrate has a thickness between 10 nm and 10 μm. The epitaxial layer is disposed on the second silicon substrate.

A semiconductor device includes first and second fins, first and second hafnium oxide layers, first and second cap layers, and first and second metal gate electrodes. The first and second fins protrude above a substrate and respectively have an n-channel region and a p-channel region. The first and second hafnium oxide layers wrap around the n-channel region and the p-channel region, respectively. The first and second cap layers wrap around the first and second annular hafnium oxide layers, respectively. The first and second cap layers are made of a same material that is lanthanum oxide, yttrium oxide, or strontium oxide. The first and second metal gate electrodes wrap around the first and second cap layers, respectively. The first and second metal gate electrodes have a same metal composition. The first and second gate dielectrics have a same dielectric composition.

A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.