The present disclosure provides a precursor solution of a semiconductor electrothermal film, which comprises component A, component B, and component C. The component A comprises the following components by weight: 2-10 parts of tin tetrachloride pentahydrate, 3-6 parts of stannous chloride and 0.3-1 part of glycerol, also comprises a pH regulator, the pH of the component A is 4.7-6.2; the component B comprises the following components by weight: 5-10 parts of conductivity regulator, the conductivity regulator is selected from a group consisting of antimony trichloride dihydrate, bismuth trioxide, aluminum oxide and thallium dioxide, 0.6-1 part chlorinated aluminum and a mixture thereof, also comprises a pH regulator, the pH of the component B is 4.7-5.0; the component C comprises the following components by weight: 0.5-0.7 parts of tin oxide, 0.8-1.5 parts of bismuth oxide and 15-25 parts of ethanol; also comprises 15-30 parts of distilled water. A preparation method of electrothermal film and electrothermal structure is further provided. The obtained semiconductor electrothermal film has good nature of resistance to sudden temperature changes, good temperature stability, attenuation resistance, fast heating speed, and high temperature resistance.

A memory cell includes a transistor over a semiconductor substrate. The transistor includes a ferroelectric layer arranged along a sidewall of a word line. The ferroelectric layer includes a species with valence of 5, valence of 7, or a combination thereof. An oxide semiconductor layer is electrically coupled to a source line and a bit line. The ferroelectric layer is disposed between the oxide semiconductor layer and the word line.

A memory device includes: a first layer stack and a second layer stack formed successively over a substrate, where each of the first and the second layer stacks includes a first metal layer, a second metal layer, and a first dielectric material between the first and the second metal layers; a second dielectric material between the first and the second layer stacks; a gate electrode extending through the first and the second layer stacks, and through the second dielectric material; a ferroelectric material extending along and contacting a sidewall of the gate electrode; and a channel material, where a first portion and a second portion of the channel material extend along and contact a first sidewall of the first layer stack and a second sidewall of the second layer stack, respectively, where the first portion and the second portion of the channel material are separated from each other.

Transistors with metal oxide channel material that is in-situ doped for desired charge carrier concentrations. The metal oxide channel material may be deposited by atomic layering of multiple constituent metals with an oxidation of each layer. Such an ALD process may be performed by cyclically depositing a precursor of one of the metals upon a substrate during a deposition phase, and oxidizing the absorbed precursor during an oxidation phase. For a quinary metal oxide, each of three metal precursors may be introduced and oxidized during the ALD process, and charge carrier concentrations may be modulated by further introducing a fourth metal precursor during the ALD process in a manner that disperses this dopant metal within the film at a significantly lower chemical concentration than the other metals.

A semiconductor structure includes a two-dimensional array of unit cell structures overlying a substrate. Each unit cell structure includes an active layer, a gate dielectric underlying the active layer, two gate electrodes underlying the gate dielectric, and two source electrodes and a drain electrode overlying the active layer. Word lines underlie the active layers. Each unit cell structure includes portions of a respective set of four word lines, which includes two word lines that are electrically connected to two electrodes in the unit cell structure and two additional word lines that are electrically isolated from the two electrodes in the unit cell structure.

A semiconductor device with low parasitic capacitance is provided. The semiconductor device includes a first oxide insulator, an oxide semiconductor, a second oxide insulator, a gate insulating layer, a gate electrode layer, source and drain electrode layers and an insulating layer. The oxide semiconductor includes first to fifth regions. The first region overlaps with the source electrode layer. The second region overlaps with the drain electrode layer. The third region overlaps with the gate electrode layer. The fourth region is between the first region and the third region. The fifth region is between the second region and the third region. The fourth region and the fifth region each contain an element N (N is hydrogen, nitrogen, helium, neon, argon, krypton, or xenon). A top surface of the insulating layer is positioned at a lower level than top surfaces of the source and drain electrode layers.

The present invention relates to an oxide sintered material that can be used suitably as a sputtering target for forming an oxide semiconductor film using a sputtering method, a method of producing the oxide sintered material, a sputtering target including the oxide sintered material, and a method of producing a semiconductor device 10 including an oxide semiconductor film 14 formed using the oxide sintered material.

A semiconductor device with enhanced semiconductor characteristics that is useful for power devices. A semiconductor device, including: an n-type semiconductor layer; an electrode; two or more p-type semiconductors provided between the n-type semiconductor layer and the electrode, the n-type semiconductor layer containing a corundum-structured crystallin oxide semiconductor as a major component, a number of the two or more p-type semiconductor that is equal to or more than three, and the two or more p-type semiconductors that are embedded in the n-type semiconductor layer.

A manufacturing method of an indium tin oxide (ITO) thin film based on a solution method is disclosed. The manufacturing method includes: a step of providing an array substrate; a step of obtaining a dispersion solution by mixing ITO grains, an organic small molecule phase transfer agent, and an N-chlorosuccinimide (NCs) solution; a step of obtaining uniformly assembled ITO grains by coating the dispersion solution onto a passivation layer and baking to remove the organic small molecule phase transfer agent; and a step of obtaining the ITO thin film by annealing at an inert atmosphere to refine the ITO grains.

Disclosed is a thin film transistor, a method for manufacturing the same and a display apparatus comprising the same, wherein the thin film transistor includes a first insulating layer on a substrate, an active layer on the first insulating layer, and a gate electrode spaced apart from the active layer and configured to have at least a portion overlapped with the active layer, wherein the active layer has a single crystal structure of an oxide semiconductor material, and an upper surface of the first insulating layer which contacts the active layer is an oxygen (O) layer made of oxygen (O).