A method for growing a transition metal dichalcogenide layer involves arranging a substrate having a first transition metal contained pad is arranged in a chemical vapor deposition chamber. A chalcogen contained precursor is arranged upstream of the substrate in the chemical vapor deposition chamber. The chemical vapor deposition chamber is heated for a period of time during which a transition metal dichalcogenides layer, containing transition metal from the first transition metal contained pad and chalcogen from the chalcogen contained precursor, is formed in an area adjacent to the first transition metal contained pad.

The present disclosure generally relates to bilayer metal dichalcogenides, to processes for forming bilayer metal dichalcogenides, and to uses of bilayer metal dichalcogenides in devices for quantum electronics. In an aspect, a device is provided. The device includes a gate electrode, a substrate disposed over at least a portion of the gate electrode, and a bottom layer including a first metal dichalcogenide, the bottom layer disposed over at least a portion of the substrate. The device further includes a top layer including a second metal dichalcogenide, the top layer disposed over at least a portion of the bottom layer, the first metal dichalcogenide and the second metal dichalcogenide being the same or different. The device further includes a source electrode and a drain electrode disposed over at least a portion of the top layer.

Disclosed herein are thermoreflectance enhancement coatings and methods of making and use thereof.

Disclosed are an electronic device including a two-dimensional material, and a method of fabricating the electronic device. The electronic device may include a first metal layer including a transition metal, a second metal layer on the first metal layer and including gold (Au), and a two-dimensional material layer between the first metal layer and the second metal layer. The two-dimensional material layer may include a transition metal dichalcogenide (TMD). The two-dimensional material layer may be formed as a chalcogen element diffuses into the second metal layer and reacts with the transition metal of the first metal layer adjacent to the second metal layer.

Embodiments herein describe techniques for a thin-film transistor (TFT) above a substrate. The transistor includes a contact electrode having a conductive material above the substrate, an epitaxial layer above the contact electrode, and a channel layer including a channel material above the epitaxial layer and above the contact electrode. The channel layer is in contact at least partially with the epitaxial layer. A conduction band of the channel material and a conduction band of a material of the epitaxial layer are substantially aligned with an energy level of the conductive material of the contact electrode. A bandgap of the material of the epitaxial layer is smaller than a bandgap of the channel material. Furthermore, a gate electrode is above the channel layer, and separated from the channel layer by a gate dielectric layer. Other embodiments may be described and/or claimed.

Systems and methods disclosed and contemplated herein relate to manufacturing thin film semiconductors. Resulting thin film semiconductors are particularly suited for applications such as flexible optoelectronics and photovoltaic devices. Broadly, methods and techniques disclosed herein include high-temperature deposition techniques combined with lift-off in aqueous environments. These methods and techniques can be utilized to incorporate thin film semiconductors into substrates that have limited temperature tolerances.

A method of making an atomic layer nanoribbon that includes forming a double atomic layer ribbon having a first monolayer and a second monolayer on a surface of the first monolayer, wherein the first monolayer and the second monolayer each contains a transition metal dichalcogenide material, oxidizing at least a portion of the first monolayer to provide an oxidized portion, and removing the oxidized portion to provide an atomic layer nanoribbon of the transition metal dichalcogenide material. Also provided are double atomic layer ribbons, double atomic layer nanoribbons, and single atomic layer nanoribbons prepared according to the method.

A system and method for performing is laser induced forward transfer (LIFT) of 2D materials is disclosed. The method includes generating a receiver substrate, generating a donor substrate, wherein the donor substrate comprises a back surface and a front surface, applying a coating to the front surface, wherein the coating includes donor material, aligning the front surface of the donor substrate to be parallel to and facing the receiver substrate, wherein the donor material is disposed adjacent to the target layer, and irradiating the coating through the back surface of the donor substrate with one or more laser pulses produced by a laser to transfer a portion of the donor material to the target layer. The donor material may include Bi.sub.2S.sub.3-xS.sub.x, MoS.sub.2, hexagonal boron nitride (h-BN) or graphene. The method may be used to create touch sensors and other electronic components.

A topological material includes a lattice crystalline structure; and a material defect in the lattice crystalline structure that is treatable by hydrogen passivation that chemically mitigates an electronic charge associated with the material defect. The lattice crystalline structure includes dangling bonds in an atomic arrangement of the material defect of the lattice crystalline structure, and the hydrogen passivation may apply hydrogen to chemically passivate the dangling bonds of the material defect. The hydrogen passivation may be achieved by diffusing hydrogen into common materials of the lattice crystalline structure. The hydrogen passivation may chemically and/or electrostatically neutralize an electronic activity associated with the material defect.

Provided is a semiconductor device which use a two-dimensional semiconductor material as a channel layer. The semiconductor device includes: a gate electrode on a substrate; a gate dielectric on the gate electrode; a channel layer on the gate dielectric; and a source electrode and a drain electrode that may be electrically connected to the channel layer. The gate dielectric has a shape with a height greater than a width, and the channel layer includes a two-dimensional semiconductor material.