Embodiments of the present invention provide a semiconductor structure having a strain relaxed buffer, and method of fabrication. A strain relaxed buffer is disposed on a semiconductor substrate. A silicon region and silicon germanium region are disposed adjacent to each other on the strain relaxed buffer. An additional region of silicon or silicon germanium provides quantum well isolation.

A p-channel tunneling field effect transistor (TFET) is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The p-channel TFET includes a channel region comprising one of a silicon-germanium alloy with non-zero germanium content and a ternary III-V alloy. An n-channel TFET is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The n-channel TFET includes an n-type region, a p-type region with a p-type delta doping, and a channel region disposed between and spacing apart the n-type region and the p-type region. The p-channel TFET and the n-channel TFET may be electrically connected to define a complementary field-effect transistor element. TFETs may be fabricated from a silicon-germanium TFET layer structure grown by low temperature molecular beam epitaxy at a growth temperature at or below 500 C.

A cylindrical confinement electron gas confined within a two-dimensional cylindrical region can be formed in a vertical semiconductor channel extending through a plurality of electrically conductive layers comprising control gate electrodes. A memory film in a memory opening is interposed between the vertical semiconductor channel and the electrically conductive layers. The vertical semiconductor channel includes a wider band gap semiconductor material and a narrow band gap semiconductor material. The cylindrical confinement electron gas is formed at an interface between the wider band gap semiconductor material and the narrow band gap semiconductor material. As a two-dimensional electron gas, the cylindrical confinement electron gas can provide high charge carrier mobility for the vertical semiconductor channel, which can be advantageously employed to provide higher performance for a three-dimensional memory device.

A semiconductor structure includes a substrate, a transition body over the substrate, a group III-V intermediate body having a bottom surface over the transition body and a group III-V device layer over a top surface of the group III-V intermediate body. The group III-V intermediate body has a first impurity concentration at the bottom surface, a second impurity concentration at the top surface, and a variable impurity concentration that rises and falls between the bottom surface and the top surface. The first impurity concentration is greater than the second impurity concentration.

An apparatus and method for creating nanometric delta doped layers in epitaxial diamond includes providing a dummy gas load with gas impedance equivalent to the reactor, and switching gas supplied between the reactor and the gas dummy load without stopping either flow, thereby enabling rapid flow and rapid gas switching without turbulence. An atomically smooth, undamaged substrate can be prepared, preferably in the (100) plane, by etching the surface after polishing to remove subsurface damage. A gas phase chemical getter reactant such as hydrogen disulfide can be used to suppress incorporation of residual boron into the intrinsic layers. Embodiments can produce interfaces between doped and mobile layers that provide at least 100 cm.sup.2/Vsec carrier mobility and 10.sup.13 cm.sup.2 sheet carrier concentration.

An apparatus and method for creating nanometric delta doped layers in epitaxial diamond includes providing a dummy gas load with gas impedance equivalent to the reactor, and switching gas supplied between the reactor and the gas dummy load without stopping either flow, thereby enabling rapid flow and rapid gas switching without turbulence. An atomically smooth, undamaged substrate can be prepared, preferably in the (100) plane, by etching the surface after polishing to remove subsurface damage. A gas phase chemical getter reactant such as hydrogen disulfide can be used to suppress incorporation of residual boron into the intrinsic layers. Embodiments can produce interfaces between doped and mobile layers that provide at least 100 cm.sup.2/Vsec carrier mobility and 10.sup.13 cm.sup.2 sheet carrier concentration.

A silicon carbide semiconductor substrate includes an epitaxial layer. A difference of a donor concentration and an acceptor concentration of the epitaxial layer is within a range from 110.sup.14/cm.sup.3 to 110.sup.15/cm.sup.3. Further, the donor concentration and the acceptor concentration of the epitaxial layer are a concentration unaffected by an impurity inside epitaxial growth equipment.

A manufacturing method of a TFT substrate structure is provided, in which a graphene layer is formed on a semiconductor layer and after the formation of a second metal layer, the second metal layer is used as a shielding mask to conduct injection of fluoride ions into the graphene layer to form a modified area in a portion of the graphene layer that is located on and corresponds to a channel zone of the semiconductor layer. The modified area of the graphene layer shows a property of electrical insulation and a property of blocking moisture/oxygen so as to provide protection to the channel zone. Portions of the graphene layer that are located under source and drain electrodes are not doped with ions and preserve the excellent electrical conduction property of graphene to provide electrical connection between the source and drain electrodes and the semiconductor layer.

A novel doping technology for semiconductor wafers has been developed, referred to as a quantum doping process that permits the deposition of only a fixed, controlled number of atoms in the form of a monolayer in a substitutional condition where only unterminated surface bonds react with the dopant, thus depositing only a number of atoms equal to the atomic surface density of the substrate material. This technique results in providing a quantized set of possible dopant concentration values that depend only on the additional number of layers of substrate material formed over the single layer of dopant atoms.

A method of fabricating a semiconductor device can include forming a III-N semiconductor layer in a reactor and injecting a hydrocarbon precursor into the reactor, thereby carbon doping the III-N semiconductor layer and causing the III-N semiconductor layer to be insulating or semi-insulating. A semiconductor device can include a substrate and a carbon doped insulating or semi-insulating III-N semiconductor layer on the substrate. The carbon doping density in the III-N semiconductor layer is greater than 510.sup.18 cm.sup.3 and the dislocation density in the III-N semiconductor layer is less than 210.sup.9 cm.sup.2.