H01L21/0262

SEMICONDUCTOR DEVICE
20230231051 · 2023-07-20 · ·

A semiconductor device includes a gate structure on a substrate and an epitaxial layer adjacent to the gate structure, in which the epitaxial layer includes a first buffer layer, a second buffer layer on the first buffer layer, a bulk layer on the second buffer layer, a first cap layer on the bulk layer, and a second cap layer on the first cap layer. Preferably, the bottom surface of the first buffer layer includes a linear surface, a bottom surface of the second buffer layer includes a curve, and the second buffer layer includes a linear sidewall.

EPITAXIAL WAFER, METHOD OF MANUFACTURING THE EPITAXIAL WAFER, AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE EPITAXIAL WAFER
20230232608 · 2023-07-20 ·

[summary]

An epitaxial wafer is disclosed. The epitaxial wafer includes a substrate; and a stack disposed on the substrate, wherein the stack includes silicon (Si) layers and silicon germanium (SiGe) layers alternately stacked on top of each other, wherein the silicon germanium layer is doped with boron (B) or phosphorus (P).

SYNTHESIS AND USE OF PRECURSORS FOR ALD OF MOLYBDENUM OR TUNGSTEN CONTAINING THIN FILMS
20230227977 · 2023-07-20 ·

Processes for forming Mo and W containing thin films, such as MoS.sub.2, WS.sub.2, MoSe.sub.2, and WSe.sub.2 thin films are provided. Methods are also provided for synthesizing Mo or W beta-diketonate precursors. Additionally, methods are provided for forming 2D materials containing Mo or W.

Epitaxial Source/Drain Structure and Method of Forming Same
20230231052 · 2023-07-20 ·

A semiconductor device and a method of forming the same are provided. The semiconductor device includes a gate stack over an active region and a source/drain region in the active region adjacent the gate stack. The source/drain region includes a first semiconductor layer having a first germanium concentration and a second semiconductor layer over the first semiconductor layer. The second semiconductor layer has a second germanium concentration greater than the first germanium concentration. The source/drain region further includes a third semiconductor layer over the second semiconductor layer and a fourth semiconductor layer over the third semiconductor layer. The third semiconductor layer has a third germanium concentration greater than the second germanium concentration. The fourth semiconductor layer has a fourth germanium concentration less than the third germanium concentration.

Integrated photonics including waveguiding material

A photonic structure can include in one aspect one or more waveguides formed by patterning of waveguiding material adapted to propagate light energy. Such waveguiding material may include one or more of silicon (single-, poly-, or non-crystalline) and silicon nitride.

Semiconductor device and manufacturing method thereof

A semiconductor device includes a Fin FET device. The Fin FET device includes a first fin structure extending in a first direction and protruding from an isolation insulating layer, a first gate stack including a first gate electrode layer and a first gate dielectric layer, covering a portion of the first fin structure and extending in a second direction perpendicular to the first direction, and a first source and a first drain, each including a first stressor layer disposed over the first fin structure. The first fin structure and the isolation insulating layer are disposed over a substrate. A height Ha of an interface between the first fin structure and the first stressor layer measured from the substrate is greater than a height Hb of a lowest height of the isolation insulating layer measured from the substrate.

METHOD FOR FORMING A LAYER PROVIDED WITH SILICON

A method for forming layers with silicon is disclosed. The layers may be created by positioning a substrate within a processing chamber, heating the substrate to a first temperature between 300 and 500° C. and introducing a first precursor into the processing chamber to deposit a first layer. The substrate may be heated to a second temperature between 400 and 600° C.; and, a second precursor may be introduced into the processing chamber to deposit a second layer. The first and second precursor may comprise silicon atoms and the first precursor may have more silicon atoms per molecule than the second precursor.

Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium

There is provided a technique that includes filling a concave portion formed on a surface of a substrate with a first film and a second film by performing: (a) forming the first film having a hollow portion using a first precursor so as to fill the concave portion formed on the surface of the substrate; (b) etching a portion of the first film which makes contact with the hollow portion, using an etching agent; and (c) forming the second film on the first film of which the portion is etched, using a second precursor, wherein (b) includes performing, a predetermined number of times: (b-1) modifying a portion of the first film using a modifying agent; and (b-2) selectively etching the modified portion of the first film using the etching agent.

Semiconductor device and forming method thereof

A semiconductor device includes a semiconductor substrate, a semiconductor fin extending from the semiconductor substrate, a gate structure extending across the semiconductor fin, and source/drain semiconductor layers on opposite sides of the gate structure. The source/drain semiconductor layers each have a first thickness over a top side of the semiconductor fin and a second thickness over a lateral side of the semiconductor fin. The first thickness and the second thickness have a difference smaller than about 20 percent of the first thickness.

Nanosheet transistors with strained channel regions

A method of fabricating a semiconductor device is described. The method includes forming a nanosheet stack on a substrate, the nanosheet stack includes nanosheet channel layers. A gate is formed around the nanosheet channel layers of the nanosheet stack. A strained material is formed along a sidewall surface of the gate. The strained material is configured to create strain in the nanosheet channel layers of the nanosheet stack.