A layer of additive material is formed in a circular printing area on a substrate using additive sources distributed across a printing zone. The additive sources form predetermined discrete amounts of the additive material. The substrate and the additive sources are rotated with respect to each other around a center of rotation, so that a pattern of the additive material is formed in a circular printing area on the substrate. Each additive source receives actuation waveforms at an actuation frequency that is proportional to a distance of the additive source from the center of rotation. The actuation waveforms include formation signals, with a maximum of one formation signal in each cycle of the actuation frequency. The formation signals result in the additive sources forming the predetermined discrete amounts of the additive material on the substrate.

A system and method for determining clearance between a fabrication tool and a workpiece is provided. In an exemplary embodiment, the method includes receiving a substrate within a tool such that a gap is defined there between. A transducer disposed on a bottom surface of the substrate opposite the gap provides an acoustic signal that is conducted through the substrate. The transducer also receives a first echo from a top surface of the substrate that defines the gap and a second echo from a bottom surface of the tool that further defines the gap. A width of the gap is measured based on the first echo and the second echo. In some embodiments, the bottom surface of the tool is a bottom surface of a nozzle, and the nozzle provides a liquid or a gas in the gap while the transducer is receiving the first and second echoes.

The present invention provides a preparation method for a fully-transparent thin film transistor, wherein a transparent conductive gate electrode layer of the fully-transparent thin film transistor is used as a photolithographic mask, a photoresist is exposed through a rear surface of a transparent substrate, the transparent substrate has a transmittance higher than 60% to an exposure light beam, and the transparent conductive gate electrode layer has a transmittance lower than 5% to the exposure light beam. In the preparation method for a fully-transparent thin film transistor provided by the present invention, by using a self-aligned technology, the process complexity and the feature size of the device can both be reduced.

A method is provided for forming structures upon a substrate. The method comprises: depositing fluid onto a substrate so as to define a wetted region, the fluid containing electrically polahzable nanoparticles; applying an alternating electric field to the fluid on the region, using a first electrode and a second electrode, so that a plurality of the nanoparticles are assembled to form an elongate structure extending from the first electrode towards the second electrode; and removing the fluid such that the elongate structure remains upon the substrate.

A flexible electronic component in this disclosure comprises a flexible fabric substrate and a smoothing layer formed on the flexible fabric substrate. A layer of nanoplatelets derived from a layered material is deposited on the smoothing layer by inkjet printing. The layer of nanoplatelets may form a first layer of a first nanoplatelet material and there may be provided at least a second layer, of a different nanoplatelet material, formed at least in part on the first layer. First and second electrodes are provided in contact respectively with the first and second layers.

Disclosed are an apparatus and a method for treating a substrate. The method includes repeatedly rotating the substrate alternately at a first speed and at a second speed while the treatment liquid is supplied, and the second speed is higher than the first speed.

A microelectronic device is formed by forming at least a portion of a substrate of the microelectronic device by one or more additive processes. The additive processes may be used to form semiconductor material of the substrate. The additive processes may also be used to form dielectric material structures or electrically conductive structures, such as metal structures, of the substrate. The additive processes are used to form structures of the substrate which would be costly or impractical to form using planar processes. In one aspect, the substrate may include multiple doped semiconductor elements, such as wells or buried layers, having different average doping densities, or depths below a component surface of the substrate. In another aspect, the substrate may include dielectric isolation structures with semiconductor material extending at least partway over and under the dielectric isolation structures. Other structures of the substrate are disclosed.

A holding table for holding a wafer includes plural pins, and a wafer holding surface includes the tips of the plural pins. Therefore, small dust enters between the pins and thus is less readily left between the wafer holding surface and the wafer. Therefore, when the wafer is sucked and held, a gap is less readily made between the wafer holding surface and the wafer. Thus, the occurrence of the situation in which the wafer is held in a waving state is suppressed. For this reason, when a liquid resin is pushed to spread over the lower surface of the wafer, an air bubble enters less readily between the liquid resin and the wafer. This can suppress entry of the air bubble in a protective member obtained by curing the liquid resin.

A field effect transistor including a dielectric layer on a substrate, a nano-structure material (NSM) layer on the dielectric layer, a source electrode and a drain electrode formed on the NSM layer, a gate dielectric formed on at least a portion of the NSM layer between the source electrode and the drain electrode, a T-shaped gate electrode formed between the source electrode and the drain electrode, where the NSM layer forms a channel of the FET, and a doping layer on the NSM layer extending at least from the sidewall of the source electrode to a first sidewall of the gate dielectric, and from a sidewall of the drain electrode to a second sidewall of the gate dielectric.

Electrochemical liquid phase epitaxy (ec-LPE) processes and devices are provided that can form precipitated epitaxial crystalline films or layers on a substrate. The precipitated films may comprise a semiconductor, such as germanium, silicon, or carbon. Dissolution into, saturation within, and precipitation of the semiconductor from a liquid metal electrode (e.g., Hg pool) near an interface region with a substrate yields a polycrystalline semiconductor material deposited as an epitaxial film. Reactor cells for use in an electrochemical liquid phase epitaxy (ec-LPE) device are also provided that include porous membranes to facilitate formation of the precipitated epitaxial crystalline films.