A method is provided for forming structures upon a substrate. The method comprises: depositing fluid onto a substrate so as to define a wetted region, the fluid containing electrically polahzable nanoparticles; applying an alternating electric field to the fluid on the region, using a first electrode and a second electrode, so that a plurality of the nanoparticles are assembled to form an elongate structure extending from the first electrode towards the second electrode; and removing the fluid such that the elongate structure remains upon the substrate.

Initial film layers prepared from tin(II) chloride spontaneously generate open cavities when the initial film layers are thermally cured to about 400 C. using a temperature ramp of 1 C./minute to 10 C./minute while exposed to air. The openings of the bowl-shaped cavities have characteristic dimensions whose lengths are in a range of 30 nm to 300 nm in the plane of the top surfaces of the cured film layers. The cured film layers comprise tin oxide and have utility in gas sensors, electrodes, photocells, and solar cells.

A low-cost separation method with high mass productivity is provided. A first layer with a thickness of 0.1 m or more and 3 m or less can be formed by using a photosensitive and thermosetting material over the formation substrate, a resin layer comprising an opening is formed by forming an opening in the first layer by using a photolithography method, a silicon layer or an oxide layer is formed so as to overlap with the opening of the resin layer, a transistor including a metal oxide is formed over the resin layer, a conductive layer formed in the same manufacturing steps as the source or drain of the transistor is formed over the silicon layer or the oxide layer, the resin layer and one of the silicon layer and the oxide layer are irradiated with the laser light, and the transistor and the conductive layer are separated from the formation substrate.

Embodiments relate to fabricating a wafer including a thin, high-quality single crystal GaN layer serving as a template for formation of additional GaN material. A bulk ingot of GaN material is subjected to implantation to form a subsurface cleave region. The implanted bulk material is bonded to a substrate having lattice and/or Coefficient of Thermal Expansion (CTE) properties compatible with GaN. Examples of such substrate materials can include but are not limited to AlN and Mullite. The GaN seed layer is transferred by a controlled cleaving process from the implanted bulk material to the substrate surface. The resulting combination of the substrate and the GaN seed layer, can form a template for subsequent growth of overlying high quality GaN. Growth of high-quality GaN can take place utilizing techniques such as Liquid Phase Epitaxy (LPE) or gas phase epitaxy, e.g., Metallo-Organic Chemical Vapor Deposition (MOCVD) or Hydride Vapor Phase Epitaxy (HVPE).

Methods and systems disclosed herein use acoustic energy to determine a gap between a wafer and an integrated circuit (IC) processing system and/or determine a thickness of a material layer of the wafer during IC processing implemented by the IC processing system. An exemplary method includes emitting acoustic energy through a substrate and a material layer disposed thereover. The substrate is positioned within an IC processing system. The method further includes receiving reflected acoustic energy from a surface of the substrate and a surface of the material layer disposed thereover and converting the reflected acoustic energy into electrical signals. The electrical signals indicate a thickness of the material layer.

Initial film layers prepared from tin(II) chloride spontaneously generate open cavities when the initial film layers are thermally cured to about 400 C. using a temperature ramp of 1 C./minute to 10 C./minute while exposed to air. The openings of the bowl-shaped cavities have characteristic dimensions whose lengths are in a range of 30 nm to 300 nm in the plane of the top surfaces of the cured film layers. The cured film layers comprise tin oxide and have utility in gas sensors, electrodes, photocells, and solar cells.

A vertical channel field-effect transistor is taught. The vertical channel field-effect transistor comprises a primary substrate and a secondary substrate. A bottom conducting layer is provided on the primary substrate. A top conducting layer is transferred from a secondary substrate to the primary substrate by using an insulating adhesive layer. The thickness of the insulating adhesive layer defines the channel length. The portion of the top conducting layer which is over the bottom conducting layer defines the maximum possible channel. At least one semiconducting layer is provided on and around a perimeter of at least a portion of the channel width. At least one insulating layer is provided on at least a portion of the at least one semiconducting layer. At least one gate conducting layer provided on at least a portion of the at least one insulating layer.

In a liquid printing method, a second workpiece is applied onto a first workpiece. A metal on the second workpiece contacts a dielectric on the first workpiece thereby forming an alloyed oxide film. This can be used to form a liquid metal printed 2D alloyed oxide film transistor. The alloyed oxide film can be InO.sub.x or other materials.

A method for fabricating low defective non-planar bipolar heterostructure transistors includes a steps of providing a substrate that is coated with a first dielectric layer when the substrate is not composed of a dielectric material. A layer of a first semiconductor material is formed by template liquid phase (TLP) crystal growth wherein a second dielectric layer is disposed over the first semiconductor material. A trench is patterned into the second dielectric layer. An intermediate heterostructure is formed by epitaxially growing second semiconductor material in the trench to form a fin structure therein. Various power transistor structures can be formed from the intermediate heterostructure.

Relaxed silicon germanium fins are formed on a bulk silicon substrate through the lateral recrystallization of molten silicon germanium having high germanium content. Following formation of the silicon germanium fins, the silicon is selectively recessed. The resulting trenches are filled with electrically insulating material and then recessed down to the bottoms of the fins.