According to the present invention, there is provided a SiC epitaxial wafer including: a 4H-SiC single crystal substrate which has a surface with an off angle with respect to a c-plane as a main surface and a bevel part on a peripheral part; and a SiC epitaxial layer having a film thickness of 20 μm or more, which is formed on the 4H-SiC single crystal substrate, in which a density of an interface dislocation extending from an outer peripheral edge of the SiC epitaxial layer is 10 lines/cm or less.

In a vapor phase growth system in which a preheating ring is provided around a susceptor, the flow rate of source gas can be adjusted by changing the position of the susceptor, and the effect on the film thickness variation of a semiconductor single-crystal layer due to the changes of the position of the susceptor is caused to be less likely to occur. The susceptor is raised/lowered by a susceptor position changing mechanism, and the height position of holding the susceptor in a reaction vessel body can be changed. A preheating ring position changing mechanism changes the height position of holding the preheating ring in the reaction vessel body based on raising/lowering of the preheating ring in accordance with the changes of the height position of holding the susceptor. The misalignment between the preheating ring and the substrate in the height direction may be reduced even if the susceptor holding position is changed, advantageously reducing the effects of insufficient heat equalization effect on the outer circumference of the substrate due to the preheating ring and the effect of turbulence in the source gas flow due to a step between the substrate main surface and the preheating ring, and thereby reducing the effects on the thickness variation of the resulting semiconductor single-crystal layer.

A method includes providing a layer of porous silicon carbide supported by a silicon carbide substrate, providing a layer of epitaxial silicon carbide on the layer of porous silicon carbide, forming a plurality of semiconductor devices in the layer of epitaxial silicon carbide, and separating the substrate from the layer of epitaxial silicon carbide at the layer of porous silicon carbide. Additional methods are described.

An epitaxial semiconductor structure includes an engineered substrate having a substrate coefficient of thermal expansion. The engineered substrate includes a polycrystalline ceramic core, a barrier layer encapsulating the polycrystalline ceramic core, a bonding layer coupled to the barrier layer, and a single crystalline layer coupled to the bonding layer. The epitaxial semiconductor structure also includes an epitaxial layer coupled to the single crystalline layer. The epitaxial layer is characterized by an epitaxial coefficient of thermal expansion substantially equal to the substrate coefficient of thermal expansion.

A method for depositing III-V alloys on substrates and compositions therefrom. A first layer comprises a Group III element. A second layer comprises a silica. A substrate has a surface. The second layer is deposited onto a first layer. The depositing is performed by a sol-gel method. The second layer is exposed to a precursor that comprises a Group V element. At least one of the precursor or the Group V element diffuse through the silica. The first layer is transformed into a solid layer comprising a III-V alloy, wherein at least a portion of the first layer to a liquid. The silica retains the liquified first layer, enabling at least one of the precursor or the Group V element to diffuse into the liquid, resulting in the forming of the III-V alloy.

A group III nitride single crystal substrate including a main surface, the main surface including: a center; a periphery; an outer region whose distance from the center is greater than 30% of a first distance, the first distance being a distance from the center to the periphery; and an inner region whose distance from the center is no more than 30% of the first distance, wherein a ratio (ν.sub.A−ν.sub.B)/ν.sub.B is within the range of ±0.1%, wherein ν.sub.A is a minimum value of peak wave numbers of micro-Raman spectra in the inner region; and ν.sub.B is an average value of peak wave numbers of micro-Raman spectra in the outer region.

There is provided a technique that includes: (a) forming a modified layer by modifying at least a portion of an oxide film of a substrate by performing, a predetermined number of times: (a1) supplying a fluorine-containing gas to the substrate including the oxide film; and (a2) supplying a first reducing gas to the substrate; and (b) supplying the fluorine-containing gas to the substrate after the modified layer is formed.

According to one embodiment, a method for manufacturing a substrate is disclosed. The method can include preparing a structure body. The structure body includes a first semiconductor member and a second semiconductor member. The first semiconductor member includes silicon carbide including a first element. The second semiconductor member includes silicon carbide including a second element. The first element includes at least one selected from a first group consisting of N, P, and As. The second element includes at least one selected from a second group consisting of B, Al, and Ga. The method can include forming a hole that extends through the second semiconductor member and reaches the first semiconductor member. In addition, the method can include forming a third semiconductor member in the hole. The third semiconductor member includes silicon carbide including a third element. The third element includes at least one selected from the first group.

To provide a silicon epitaxial wafer production method and a silicon epitaxial wafer in which the DIC defects can be suppressed, a silicon epitaxial wafer production method is provided, in which an epitaxial layer is grown in a vapor phase on a principal plane of a silicon single crystal wafer. The principal plane is a {110} plane or a plane having an off-angle of less than 1 degree from the {110} plane. The silicon epitaxial wafer production method includes setting a temperature of the silicon single crystal wafer to 1140° C. to 1165° C. and growing the epitaxial layer in the vapor phase at a growth rate of 0.5 μm/min to 1.7 μm/min.

Provided is a method of manufacturing a silicon carbide epitaxial wafer appropriate for suppressing an occurrence of a triangular defect. A method of manufacturing a silicon carbide epitaxial wafer includes: an etching process of etching a surface of a silicon carbide substrate at a first temperature using etching gas including H.sub.2; a process of flattening processing of flattening the surface etched in the etching process, at a second temperature using gas including H.sub.2 gas, first Si supply gas, and first C supply gas; and an epitaxial layer growth process of performing an epitaxial growth on the surface flattened in the process of flattening processing, at a third temperature using gas including second Si supply gas and second C supply gas, wherein the first temperature T.sub.1, the second temperature T.sub.2, and the third temperature T.sub.3 satisfy T.sub.1>T.sub.2>T.sub.3.