Patent classifications
H01L21/02661
Fin field-effect transistor device and method
A method includes forming a doped region on a top portion of a substrate, forming a first epitaxial layer over the substrate, forming a recess in the first epitaxial layer, the recess being aligned to the doped region, performing a surface clean treatment in the recess, the surface clean treatment includes: oxidizing surfaces of the recess to form an oxide layer in the recess, and removing the oxide layer from the surfaces of the recess, and forming a second epitaxial layer in the recess.
METHOD FOR GROWING A NON-POLAR A-PLANE GALLIUM NITRIDE USING ALUMINUM NITRIDE / GALLIUM NITRIDE SUPERLATTICES
A method for growing a non-polar a-plane gallium nitride includes cleaning of r-sapphire substrate, and nitridating for initiating growth sequences. The growth sequences include growing a gallium nitride nucleation layer, growing a thick first layer of gallium nitride, growing a film stack of gallium nitride and aluminum nitride as a superlattices layer, and overgrowing of gallium nitride on superlattices layer to form a second layer. The non-polar a-plane gallium nitride is grown by inserting multiple layers of a gallium nitride and an aluminum nitride for improving lateral surface morphology of gallium nitride on r-sapphire substrate.
Method of Forming a Source/Drain
Embodiments provide a way of treating source/drain recesses with a high heat treatment and an optional hydrogen plasma treatment. The high heat treatment smooths the surfaces inside the recesses and remove oxides and etching byproducts. The hydrogen plasma treatment enlarges the recesses vertically and horizontally and inhibits further oxidation of the surfaces in the recesses.
SYSTEMS AND METHODS FOR UNPRECEDENTED CRYSTALLINE QUALITY IN PHYSICAL VAPOR DEPOSITION-BASED ULTRA-THIN ALUMINUM NITRIDE FILMS
The present invention provides a method for depositing an ultra-thin film onto a wafer. The method comprising the following steps. A sputtering chamber is provided wherein the sputtering chamber is collectively defined by a wafer handling apparatus and a magnetron. The wafer is placed onto a wafer chuck of the wafer handling apparatus. The wafer chuck is moved to a first distance to the magnetron. A gas is introduced into the sputtering chamber such that the gas is separated into a plasma, wherein the plasma includes gas ions. A first negative potential is applied to at least one sputtering target of the magnetron while the wafer chuck with the wafer is at the first distance to the magnetron. The wafer chuck is moved to a second distance to the magnetron. A second negative potential is applied to at least one sputtering target of the magnetron while the wafer chuck with the wafer is at the second distance to the magnetron. The wafer is removed from the wafer chuck after the application of the second negative potential to at least one sputtering target of the magnetron.
METHODS OF FORMING SILICON GERMANIUM STRUCTURES
Methods for forming structures that include forming a heteroepitaxial layer on a substrate are disclosed. The presently disclosed methods comprise epitaxially forming a buffer layer on the substrate. The substrate has a substrate composition. The buffer layer has a buffer layer composition. The buffer layer composition is substantially identical to the substrate composition. The presently disclosed methods further comprise epitaxially forming a heteroepitaxial layer on the buffer layer. The heteroepitaxial layer has a heteroepitaxial layer composition which is different from the substrate composition.
METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, RECORDING MEDIUM, AND SUBSTRATE PROCESSING APPARATUS
There is provided a technique that includes: (a) forming a modified layer by modifying at least a portion of an oxide film of a substrate by performing, a predetermined number of times: (a1) supplying a fluorine-containing gas to the substrate including the oxide film; and (a2) supplying a first reducing gas to the substrate; and (b) supplying the fluorine-containing gas to the substrate after the modified layer is formed.
METHOD OF MANUFACTURING SILICON CARBIDE EPITAXIAL WAFER
Provided is a method of manufacturing a silicon carbide epitaxial wafer appropriate for suppressing an occurrence of a triangular defect. A method of manufacturing a silicon carbide epitaxial wafer includes: an etching process of etching a surface of a silicon carbide substrate at a first temperature using etching gas including H.sub.2; a process of flattening processing of flattening the surface etched in the etching process, at a second temperature using gas including H.sub.2 gas, first Si supply gas, and first C supply gas; and an epitaxial layer growth process of performing an epitaxial growth on the surface flattened in the process of flattening processing, at a third temperature using gas including second Si supply gas and second C supply gas, wherein the first temperature T.sub.1, the second temperature T.sub.2, and the third temperature T.sub.3 satisfy T.sub.1>T.sub.2>T.sub.3.
Fully strained channel
The present disclosure describes an exemplary method to form p-type fully strained channel (PFSC) or an n-type fully strained channel (NFSC) that can mitigate epitaxial growth defects or structural deformations in the channel region due to processing. The exemplary method can include (i) two or more surface pre-clean treatment cycles with nitrogen trifluoride (NF.sub.3) and ammonia (NH.sub.3) plasma, followed by a thermal treatment; (ii) a prebake (anneal); and (iii) a silicon germanium epitaxial growth with a silicon seed layer, a silicon germanium seed layer, or a combination thereof.
Nanocrystalline graphene and method of forming nanocrystalline graphene
Provided are nanocrystalline graphene and a method of forming the nanocrystalline graphene through a plasma enhanced chemical vapor deposition process. The nanocrystalline graphene may have a ratio of carbon having an sp.sup.2 bonding structure to total carbon within the range of about 50% to 99%. In addition, the nanocrystalline graphene may include crystals having a size of about 0.5 nm to about 100 nm.
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.