A tensile strained silicon layer is patterned to form a first group of fins in a first substrate area and a second group of fins in a second substrate area. The second group of fins is covered with a tensile strained material, and an anneal is performed to relax the tensile strained silicon semiconductor material in the second group of fins and produce relaxed silicon semiconductor fins in the second area. The first group of fins is covered with a mask, and silicon-germanium material is provided on the relaxed silicon semiconductor fins. Germanium from the silicon germanium material is then driven into the relaxed silicon semiconductor fins to produce compressive strained silicon-germanium semiconductor fins in the second substrate area (from which p-channel finFET devices are formed). The mask is removed to reveal tensile strained silicon semiconductor fins in the first substrate area (from which n-channel finFET devices are formed).

Fin field-effect transistors are provided. A fin field-effect transistor includes a semiconductor substrate; a plurality of fins on the semiconductor substrate; a gate structure across the fins by covering portions of top and side surfaces of the fins, providing portions of the fins under the gate structure as channel regions; lightly doped regions in the fins at both sides of the gate structure; doped source/drain regions in the fins at both sides of the gate structure; and counter doped regions in fins and between the lightly doped regions and the doped source/drain regions.

A nitride semiconductor device includes an electron transit layer (103) that is formed of a nitride semiconductor, an electron supply layer (104) that is formed on the electron transit layer (103), that is formed of a nitride semiconductor whose composition is different from the electron transit layer (103) and that has a recess (109) which reaches the electron transit layer (103) from a surface, a thermal oxide film (111) that is formed on the surface of the electron transit layer (103) exposed within the recess (109), a gate insulating film (110) that is embedded within the recess (109) so as to be in contact with the thermal oxide film (111), a gate electrode (108) that is formed on the gate insulating film (110) and that is opposite to the electron transit layer (103) across the thermal oxide film (111) and the gate insulating film (110), and a source electrode (106) and a drain electrode (107) that are provided on the electron supply layer (104) at an interval such that the gate electrode (108) intervenes therebetween.

There is provided a method for manufacturing a nitride semiconductor template constituted by forming a nitride semiconductor layer on a substrate, comprising: (a) preparing a pattern-substrate as the substrate, with a concavo-convex pattern formed on a front surface of the pattern-substrate, (b) forming a first layer by epitaxially growing a nitride semiconductor containing aluminum on the concavo-convex pattern of the pattern-substrate, in a thickness of not flattening a front surface; (c) applying annealing to the first layer; and (d) forming a second layer by epitaxially growing a nitride semiconductor containing aluminum so as to overlap on the first layer after performing (c), and in a thickness of flattening a front surface, and constituting the nitride semiconductor layer by the first layer and the second layer.

A method for producing a silicon carbide component includes forming a silicon carbide layer on an initial wafer, forming a doping region of the silicon carbide component to be produced in the silicon carbide layer, and forming an electrically conductive contact structure of the silicon carbide component to be produced on a surface of the silicon carbide layer. The electrically conductive contact structure electrically contacts the doping region. Furthermore, the method includes splitting the silicon carbide layer or the initial wafer after forming the electrically conductive contact structure, such that a silicon carbide substrate at least of the silicon carbide component to be produced is split off.

Semiconductor devices including structures of active region are disclosed. An example semiconductor device according to the disclosure includes a substrate, a layer on the substrate and a dielectric layer on the layer. The layer includes an interface in contact with the dielectric layer. The interface includes a first portion on a surface of the layer and a second portion perpendicular to the first portion.

The invention relates to a method for creating a substrate of the type semiconductor on insulator, comprising the following steps:

a) providing a donor substrate comprising a monocrystalline support substrate, a smoothing layer and a semiconductor layer, the smoothing layer forming an etch stop layer with respect to the material of the support substrate;

a′) implantation of ion species through the semiconductor layer so as to form a fragilization plane;

b) creating an assembly by placing the donor substrate and a receiver substrate in contact;

c) transferring the semiconductor layer and at least a part of the smoothing layer by detachment along the fragilization plane:

wherein the semiconductor layer of the donor substrate provided in step a) is monocrystalline and in that it further comprises the following steps: before step b), amorphization of at least a part of the semiconductor layer to form an amorphous layer; during or after step c), recrystallization in solid phase of the amorphous layer to form a transferred monocrystalline semiconductor layer.

A method for manufacturing a semiconductor device includes performing a first ion implantation process on a substrate to form a lower dopant region in the substrate, patterning the substrate having the lower dopant region to form active patterns, and performing a second ion implantation process on the active patterns to form an upper dopant region in an upper portion of each of the active patterns. The lower and upper dopant regions have a same conductivity type.

A nitride semiconductor device includes an electron transit layer (103) that is formed of a nitride semiconductor, an electron supply layer (104) that is formed on the electron transit layer (103), that is formed of a nitride semiconductor whose composition is different from the electron transit layer (103) and that has a recess (109) which reaches the electron transit layer (103) from a surface, a thermal oxide film (111) that is formed on the surface of the electron transit layer (103) exposed within the recess (109), a gate insulating film (110) that is embedded within the recess (109) so as to be in contact with the thermal oxide film (111), a gate electrode (108) that is formed on the gate insulating film (110) and that is opposite to the electron transit layer (103) across the thermal oxide film (111) and the gate insulating film (110), and a source electrode (106) and a drain electrode (107) that are provided on the electron supply layer (104) at an interval such that the gate electrode (108) intervenes therebetween.

A method of forming an aluminum nitride film includes: preparing a substrate that comprises, in a surface thereof, a plurality of concave portions that are separated from each other; forming an aluminum nitride film on said surface of the substrate and on an inner surface of each of the concave portions such that open holes are formed in a portion of the aluminum nitride film corresponding to each of the concave portions, each of the holes being smaller than each of openings of the concave portions; and applying heat treatment to the substrate with the aluminum nitride film formed thereon in a nitrogen gas containing a carbon monoxide gas to close the holes formed in the aluminum nitride film.