H01L21/0465

SYSTEMS AND METHODS FOR JUNCTION TERMINATION OF WIDE BAND GAP SUPER-JUNCTION POWER DEVICES

A disclosed super-junction (SJ) device includes a first epitaxial (epi) layer that forms a first SJ layer of the SJ device, and includes a second epi layer disposed on the first SJ layer that forms a device layer of the SJ device. An active area of the first and second epi layers includes a first set of SJ pillars comprising a particular doping concentration of a first conductivity type and a second set of SJ pillars comprising the particular doping concentration of a second conductivity type. A termination area of the first and second epi layers has a minimized epi doping concentration of the first conductivity type that is less than the particular doping concentration, and the termination area of the second epi layer includes a plurality of floating regions of the second conductivity type that form a junction termination of the SJ device.

METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE AND SILICON CARBIDE SEMICONDUCTOR DEVICE
20230307500 · 2023-09-28 ·

According to one embodiment, a method for manufacturing a silicon carbide semiconductor device. The method includes forming a semiconductor layer on a substrate. The method includes forming a first semiconductor region by implanting an impurity of a first conductivity type into the semiconductor layer. The first semiconductor region has a first concentration of the first conductivity type. The method includes forming a first semiconductor pillar portion and a second semiconductor pillar portion by implanting an impurity of a second conductivity type into a plurality of locations of the first semiconductor region. The first semiconductor pillar portion is of the first conductivity type. The second semiconductor pillar portion has a second concentration of the second conductivity type and is adjacent to the first semiconductor pillar portion. The method includes repeating the forming of the semiconductor layer, forming of the first semiconductor region, and the first and second semiconductor pillar portions.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
20230299130 · 2023-09-21 ·

A semiconductor device includes a semiconductor part including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type. The second semiconductor layer is provided in the first semiconductor layer. The semiconductor part includes first and second interfaces of the first semiconductor layer and the second semiconductor layer. The first interface intersects the second interface. The second semiconductor layer includes a plurality of sub-layers stacked in a direction orthogonal to the first interface. The second interface includes interfaces of the sub-layers of the second semiconductor layer and the first semiconductor layer. The second interface extending in a second direction inclined with respect to a first direction orthogonal to the first interface.

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, INVERTER CIRCUIT, DRIVING DEVICE, VEHICLE, AND ELEVATOR
20230299152 · 2023-09-21 · ·

Provided is a method for manufacturing a semiconductor device, the method including: performing first ion implantation ion-implanting a p-type impurity into a silicon carbide layer; performing second ion implantation ion-implanting carbon (C) into the silicon carbide layer; performing a first heat treatment activating the p-type impurity; performing a first oxidation treatment oxidizing the silicon carbide layer; performing an etching treatment etching the silicon carbide layer in an atmosphere containing hydrogen gas; forming a first metal film containing at least one metal element selected from the group consisting of nickel, palladium, platinum, and chromium; performing a second heat treatment causing the silicon carbide layer to react with the first metal film to form a metal silicide layer containing the at least one metal element; and forming a second metal film having a chemical composition different from a chemical composition of the first metal film.

SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, INVERTER CIRCUIT, DRIVE DEVICE, VEHICLE, AND ELEVATOR

A semiconductor device of embodiments includes: a silicon carbide layer having a first face and a second face; a trench in the silicon carbide layer extending in a first direction; a gate electrode disposed in the trench; a first silicon carbide region of n-type; a second silicon carbide region of p-type between the first silicon carbide region and the first face being shallower than the trench; a third silicon carbide region of n-type disposed between the second silicon carbide region and the first face; a fourth silicon carbide region of n-type disposed between the third silicon carbide region and the first face, a width of the fourth silicon carbide region in a second direction perpendicular to the first direction being smaller than a width of the third silicon carbide region in the second direction; and a first electrode in contact with the fourth silicon carbide region.

Systems and methods for junction termination of wide band gap super-junction power devices

A disclosed super-junction (SJ) device includes a first epitaxial (epi) layer that forms a first SJ layer of the SJ device, and includes a second epi layer disposed on the first SJ layer that forms a device layer of the SJ device. An active area of the first and second epi layers includes a first set of SJ pillars comprising a particular doping concentration of a first conductivity type and a second set of SJ pillars comprising the particular doping concentration of a second conductivity type. A termination area of the first and second epi layers has a minimized epi doping concentration of the first conductivity type that is less than the particular doping concentration, and the termination area of the second epi layer includes a plurality of floating regions of the second conductivity type that form a junction termination of the SJ device.

Semiconductor device, semiconductor device manufacturing method, inverter circuit, driver device, vehicle, and elevator

This semiconductor device according to an embodiment includes: a silicon carbide layer; a gate electrode; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration not less than 1×10.sup.21 cm.sup.−3. A nitrogen concentration distribution in the silicon carbide layer, the silicon oxide layer, and the region has its peak in the region, and a state density Z.sub.1/2 in a portion is not more than 1×10.sup.11 cm.sup.−3. The portion is within 100 nm from the silicon oxide layer toward the silicon carbide layer. A nitrogen concentration and a carbon concentration in a position 1 nm from the peak toward the silicon oxide layer is not more than 1×10.sup.18 cm.sup.−3, and a nitrogen concentration in a position 1 nm from the peak toward the silicon carbide layer is not more than 1×10.sup.18 cm.sup.−3.

Semiconductor device and method for manufacturing semiconductor device
11189709 · 2021-11-30 · ·

A semiconductor device of the present invention includes a semiconductor layer, a gate trench that defines a source region of a first conductivity type in the semiconductor layer, a channel region of a second conductivity type of a lower part of the source region, a source trench that passes through the source region and the channel region, an impurity region of the second conductivity type of a bottom part and a side part of the source trench, a source electrode on the semiconductor layer, and a highly-concentrated impurity region of the second conductivity type, the highly-concentrated impurity region having a contact portion connected to the source electrode at a surface of the semiconductor layer, the highly-concentrated impurity region passing through the source region and extending to a position deeper than the source region, the highly-concentrated impurity region having a concentration higher than the impurity region.

SCHOTTKY RECTIFIER WITH SURGE-CURRENT RUGGEDNESS

A SiC Schottky rectifier with surge current ruggedness is described. The Schottky rectifier includes one or more multi-layer bodies that provide multiple types of surge current protection.

FABRICATING SUB-MICRON CONTACTS TO BURIED WELL DEVICES

A method for forming a semiconductor structure. Two isolation structures are formed in a semiconductor. A cavity is etched in the semiconductor between the two isolation structures in the semiconductor. Dopants are implanted into a bottom side of the cavity to form a doped region in the semiconductor below the cavity between the two isolation structures. A contact is formed in the cavity. The contact is on the doped region and in direct contact with the doped region.