A semiconductor device includes a semiconductor layer structure and a gate formed in a gate trench in the semiconductor layer structure. The gate trench has a bottom surface comprising a first portion at a first level and a second portion at a second level, different from the first level. A method of forming a semiconductor device includes providing a semiconductor layer structure, etching a first gate trench into the semiconductor layer structure, etching a second gate trench into the semiconductor layer structure, and performing an ion implantation into a bottom surface of the second gate trench. The second gate trench is deeper than the first gate trench, and at least a portion of the second gate trench is connected to the first gate trench.

A semiconductor device is provided. In an example, the semiconductor device includes a trench gate structure in a silicon carbide (SiC) semiconductor body. The semiconductor device includes a source region of a first conductivity type that adjoins the trench gate structure in a first segment. The semiconductor device includes a semiconductor region of a second conductivity type. The semiconductor region includes a first sub-region arranged below the source region in the first segment, and a second sub-region arranged in a second segment that adjoins the first segment. The semiconductor device includes a current spread region of the first conductivity type. The current spread region includes a first sub-region that adjoins the trench gate structure in the first segment at a vertical distance to a first surface of the SiC semiconductor body, and a second sub-region that is spaced from the trench gate structure in the second segment at the vertical distance to the first surface by a lateral distance.

A semiconductor device has a substrate made of a first semiconductor material. The first semiconductor material is silicon carbide. A first semiconductor layer made of the first semiconductor material is disposed over the substrate. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The second semiconductor material is silicon. A third semiconductor layer made of the second semiconductor material can be disposed between the first semiconductor layer and second semiconductor layer. A semiconductor device or electrical component is formed in the second semiconductor layer. The electrical component can be a power MOSFET. A first insulating layer, such as an oxide layer, is formed over the electrical component, and second insulating layer, such as a nitride layer, is formed over the first insulating layer for protection against radiation.

A semiconductor component includes: gate structures extending from a first surface into an SiC semiconductor body; a drift zone of a first conductivity type formed in the SiC semiconductor body; first mesas and second mesas arranged between the gate structures in the SiC semiconductor body; body areas of a second conductivity type arranged in the first mesas and the second mesas, the body areas each adjoining a first side wall of one of the gate structures; first shielding areas of the second conductivity type adjoining a second side wall of one of the gate structures; second shielding areas of the second conductivity type adjoining the body areas in the second mesas; and diode areas of the conductivity type of the drift zone, the diode areas forming Schottky contacts with a load electrode between the first shielding areas and the second shielding areas.

A method for manufacturing a silicon carbide semiconductor device according to the technology disclosed in the present specification includes: forming a drift layer on an upper surface of a silicon carbide semiconductor substrate; forming a hard mask on the upper surface of the drift layer by anisotropic etching; and forming a first ion-implanted region in a surface layer of the drift layer by implanting ions into the drift layer in a state in which the hard mask is formed, in which the hard mask includes a sidewall perpendicular to the upper surface of the drift layer.

An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal that is constituted of a hexagonal crystal and having a first main surface as a device surface facing a c-plane of the SiC monocrystal and has an off angle inclined with respect to the c-plane, a second main surface at a side opposite to the first main surface, and a side surface facing an a-plane of the SiC monocrystal and has an angle less than the off angle with respect to a normal to the first main surface when the normal is 0°.

Implantation mask formation techniques described herein include increasing an initial aspect ratio of a pattern in an implantation mask by non-lithography techniques, which may include forming a resist hardening layer on the implantation mask. The pattern may be formed by photolithography techniques to the initial aspect ratio that reduces or minimizes the likelihood of pattern collapse during formation of the pattern. Then, the resist hardening layer is formed on the implantation mask to increase the height of the pattern and reduce the width of the pattern, which increases the aspect ratio between the height of the openings or trenches and the width of the openings or trenches of the pattern. In this way, the pattern in the implantation mask may be formed to an ultra-high aspect ratio in a manner that reduces or minimizes the likelihood of pattern collapse during formation of the pattern.

A method of manufacturing a silicon carbide semiconductor device includes forming a constituent layer and forming a super junction structure. The formation of the super junction structure includes forming a film-forming mask on the constituent layer, forming an opening portion at the film-forming mask, forming a mask-forming trench at the constituent layer and adopting a portion of the constituent layer surrounding the mask-forming trench as a silicon carbide mask through etching by adopting the film-forming mask, forming a second-conductivity-type column region by ion implantation of impurities at a bottom surface of the mask-forming trench by adopting an ion-implantation mask having the film-forming mask and the silicon carbide mask, and removing a portion of the constituent layer where the silicon carbide mask is formed.

A semiconductor power device has a maximum nominal voltage and includes: a first conduction terminal and a second conduction terminal; a semiconductor body, containing silicon carbide and having a first conductivity type; body wells having a second conductivity type, housed in the semiconductor body and separated from one another by a body distance; source regions housed in the body wells; and floating pockets having the second conductivity type, formed in the semiconductor body at a distance from the body wells between a first face and a second face of the semiconductor body. The floating pockets are shaped and arranged relative to the body wells so that a maximum intensity of electrical field around the floating pockets is greater than a maximum intensity of electrical field around the body wells at least for values of a conduction voltage between the first conduction terminal and the second conduction terminal greater than a threshold voltage, the threshold voltage being less than the maximum nominal voltage.

A semiconductor device according to an embodiment includes a SiC layer having a first and a second plane, a first SiC region of a first conductivity type, second and third SiC regions of a second conductivity type provided between the first SiC region and the first plane, a fourth SiC region of the first conductivity type provided between the second SiC region and the first plane, a fifth SiC region of the first conductivity type provided between the third SiC region and the first plane, a gate electrode provided between the second SiC region and the third SiC region, a gate insulating layer, a sixth SiC region of the second conductivity type provided between the first SiC region and the second SiC region, and a seventh SiC region of the second conductivity type provided between the first SiC region and the third SiC region.