An analysis apparatus according to an aspect of the present disclosure includes a substrate holding unit, an insertion unit, and a gas analysis unit. The substrate holding unit holds a bonded substrate where a first substrate and a second substrate are bonded. The insertion unit is capable of being inserted between a bonding surface of the first substrate and a bonding surface of the second substrate in the bonded substrate that is held by the substrate holding unit. The gas analysis unit analyzes a component(s) of a gas or gasses that is/are jetted from between a bonding surface of the first substrate and a bonding surface of the second substrate.

A method of wafer bonding includes: forming a first hole in a first insulation layer disposed over a first substrate; performing a first deposition-self-etch process to deposit a first conductive material in the first hole to form a first conductive plug; forming a second hole in a second insulation layer disposed over a second substrate; performing a second deposition-self-etch process to deposit a second conductive material in the second hole to form a second conductive plug; and bonding the first conductive plug with the second conductive plug to form a first grain fusion layer between the first conductive plug and the second conductive plug.

A method of wafer bonding includes: forming a first hole in a first insulation layer disposed over a first substrate; performing a first deposition-self-etch process to deposit a first conductive material in the first hole to form a first conductive plug; forming a second hole in a second insulation layer disposed over a second substrate; performing a second deposition-self-etch process to deposit a second conductive material in the second hole to form a second conductive plug; and bonding the first conductive plug with the second conductive plug to form a first grain fusion layer between the first conductive plug and the second conductive plug.

A method for fabricating an integrated device, the method including: forming a first level including a first mono-crystal layer, where forming the first level includes forming a plurality of single crystal transistors, a plurality of pixel control circuits, and a plurality of recessed channel transistors therein; disposing an overlying oxide on top of the first level; providing a second level including a second mono-crystal layer, where the second mono-crystal layer includes a plurality of image sensors; bonding the second level to the first level via an oxide-to-oxide bond such that the second level overlays the oxide; and including disposing a third level underneath the first level, where the third level includes a plurality of third transistors, and where the plurality of third transistors each include a single crystal channel.

Stacked die assemblies having a moisture sealant layer according to embodiments are described herein. A microelectronic package structure having a first die with a second and an adjacent third die on the first die. Each of the second and third die comprise hybrid bonding interfaces with the first die. A first layer is on a region of the first die adjacent sidewalls of the second and the third dies, and adjacent an edge portion of the first die. The first layer comprises a diffusion barrier material A second layer is over the first layer, the second layer, wherein a top surface of the second layer is substantially coplanar with the top surfaces of the second and third dies. The first layer provides a hermetic moisture sealant layer for stacked die package structures.

A method for manufacturing a semiconductor structure includes: forming a first bonding layer on a device substrate formed with a semiconductor device so as to cover the semiconductor device, wherein the first bonding layer includes a first metal oxide material in an amorphous state; forming a second bonding layer on a carrier substrate, wherein the second bonding layer includes a second metal oxide material in an amorphous state; conducting a surface modification process on the first bonding layer and the second bonding layer; bonding the device substrate and the carrier substrate to each other through the first and second bonding layers; and annealing the first and second bonding layers so as to convert the first and second metal oxide materials from the amorphous state to a crystalline state.