A semiconductor structure includes a substrate, a first semiconductor layer, a second semiconductor layer and a p-type ion doping layer sequentially disposed, the p-type ion doping layer includes an activation region and a passivation region enclosing the activation region, and the activation region is an oxygen-doped region. Hydrogen doped in the p-type ion doping layer can be replaced by low-temperature annealing after a process of implementing oxygen ion-implantation, so as to improve activation efficiency of the p-type ion doping layer; the activation region in a gate electrode region and the passivation region in an non-gate electrode region are formed by using a method for selectively activating the p-type ion doping layer, avoiding etching of the p-type ion doping layer, and thus avoiding etching losses; and a plurality of patterned activation regions are obtained by selectively activating on a same substrate, which facilitates batch preparation of enhancement mode semiconductor devices.

A method of forming doped regions by diffusion in gallium nitride materials includes providing a substrate structure including a gallium nitride layer and forming a mask on the gallium nitride layer. The mask exposes one or more portions of a top surface of the gallium nitride layer. The method also includes depositing a magnesium-containing gallium nitride layer on the one or more portions of the top surface of the gallium nitride layer and concurrently with depositing the magnesium-containing gallium nitride layer, forming one or more magnesium-doped regions in the gallium nitride layer by diffusing magnesium into the gallium nitride layer through the one or more portions. The magnesium-containing gallium nitride layer provides a source of magnesium dopants. The method further includes removing the magnesium-containing gallium nitride layer and removing the mask.

The invention belongs to the technical field of semiconductor material preparation, and in particular provides a preparation method of tin doped n-type gallium oxide. To pre-deposit the appropriate tin doping source on gallium oxide materials in proper ways. The gallium oxide material is then placed in a high temperature tube in an appropriate manner. Then the tin atoms can be controlled to diffuse into the gallium oxide material by heat treatment at a certain temperature for a period of time. Then the tin atoms can be activated as an effective donor to realize the n-type doping of the gallium oxide material. In this invention, the doping can be realized after the preparation of the gallium oxide material is completed, and the necessary equipment and process are simple, and the doping controllability is high. The tin doping technique can not only fabricate the vertical structure device based on the n-type gallium oxide material, but also fabricate the transverse device structure and integrate various devices, so as to develop a new gallium oxide-based device which cannot be fabricated by the traditional doping technique.

A vertical semiconductor apparatus includes: a gallium nitride substrate; a gallium nitride semiconductor layer on the gallium nitride substrate; a p-type impurity region in the gallium nitride semiconductor layer and having an element to function as an acceptor for gallium nitride; an n-type impurity region in the p-type impurity region and having an element to function as a donor for gallium nitride; and an electrode provided contacting a rear surface of the gallium nitride substrate. The element to function as the donor in the n-type impurity region includes: a first impurity element to enter sites of gallium atoms in the gallium nitride semiconductor layer; and a second impurity element different from the first impurity element and to enter sites of nitrogen atoms in the gallium nitride semiconductor layer. In the n-type impurity region, a concentration of the first impurity element is higher than that of the second impurity element.

A manufacturing method of an HEMT includes: forming a heterostructure; forming a first gate layer of intrinsic semiconductor material on the heterostructure; forming a second gate layer, containing dopant impurities of a P type, on the first gate layer; removing first portions of the second gate layer so that second portions, not removed, of the second gate layer form a doped gate region; and carrying out a thermal annealing of the doped gate region so as to cause a diffusion of said dopant impurities of the P type in the first gate layer and in the heterostructure, with a concentration, in the heterostructure, that decreases as the lateral distance from the doped gate region increases.

FinFET devices including III-V fin structures and silicon-based source/drain regions are formed on a semiconductor substrate. Silicon is diffused into the III-V fin structures to form n-type junctions. Leakage through the substrate is addressed by forming p-n junctions adjoining the source/drain regions and isolating the III-V fin structures under the channel regions.

An enhanced GaN high electron mobility transistor (HEMT) radio-frequency device and a manufacturing method thereof are provided. The enhanced GaN HEMT radio-frequency device includes a substrate, a first AlN interposed layer, a GaN buffer layer, a GaN trench layer, a second AlN interposed layer, an AlGaN barrier layer, a p-AlGaN layer, a metal drain electrode, a metal source electrode, and a metal gate electrode. Under an extremely high vacuum degree, metal Mg is doped and diffused to the AlGaN layer to form the p-AlGaN layer, and the metal Mg further forms a p-n junction with the undoped AlGaN layer, thereby depleting a two-dimensional electron gas (2DEG) under the gate. A HfO.sub.2 layer covers the metal Mg to prevent oxidation of the metal Mg.

A semiconductor device includes a nitride semiconductor layer, a first electrode and second electrode on the nitride semiconductor layer, a gate electrode, and a gate insulating layer between the nitride semiconductor layer and the gate electrode. The gate insulating layer has a first oxide region containing at least any one element of aluminum and boron, gallium, and silicon. When a distance between the first end portion and the second end portion of the first oxide region is defined as d1, and a position separated by d1/10 from the first end portion toward the second end portion is defined as a first position, an atomic concentration of gallium at the first position is 80% or more and 120% or less of that of the at least any one element.

Disclosed herein is a method for doping a substrate, comprising disposing a coating of a composition comprising a copolymer, a dopant precursor and a solvent on a substrate; where the copolymer is capable of phase segregating and embedding the dopant precursor while in solution; and annealing the substrate at a temperature of 750 to 1300 C. for 0.1 second to 24 hours to diffuse the dopant into the substrate. Disclosed herein too is a semiconductor substrate comprising embedded dopant domains of diameter 3 to 30 nanometers; where the domains comprise Group 13 or Group 15 atoms, wherein the embedded spherical domains are located within 30 nanometers of the substrate surface.

A compound semiconductor device includes: a compound semiconductor area in which a compound semiconductor plug is embedded and formed; and an ohmic electrode provided on the compound semiconductor plug, wherein the compound semiconductor plug includes, in a side surface portion that is as an interface with the compound semiconductor area, a high concentration dopant layer containing a dopant whose concentration is higher than that of other portions.