A semiconductor device includes a substrate, a semiconductor fin, a silicon layer, a gate structure, gate spacers, and source/drain structures. The semiconductor fin is over the substrate. The silicon layer is over the semiconductor fin. The gate structure is over the silicon layer, in which the gate structure includes an interfacial layer over the silicon layer, a gate dielectric layer over the interfacial layer, and a gate electrode over the gate dielectric layer. The gate spacers are on opposite sidewalls of the gate structure and in contact with the interfacial layer of the gate structure, in which a bottom surface of the interfacial layer is higher than bottom surfaces of the gate spacers. The source/drain structures are on opposite sides of the gate structure.

Improved gate stack designs for Si and SiGe dual channel devices are provided. In one aspect, a method for forming a dual channel device includes: forming fins on a substrate, the fins including Si fins in combination with SiGe fins as dual channels of an analog device and a logic device, with the analog device and the logic device each having a Si fin and a SiGe fin; forming a silicon germanium oxide (SiGeOx) layer on the SiGe fins; annealing the SiGeOx layer to form a Si-rich layer on the SiGe fins via a reaction between SiGeOx and SiGe; and forming metal gates over the Si fins and over the Si-rich layer on the SiGe fins. A dual channel device is also provided.

A semiconductor device and a method for fabricating a semiconductor device involve a semiconductor layer that includes a first material and a second material. The first and second materials can be silicon and germanium. A contact of the device has a portion proximal to the semiconductor layer and a portion distal to the semiconductor layer. The distal portion includes the first material and the second material. A metal layer formed adjacent to the relaxed semiconductor layer and adjacent to the distal portion of the contact is simultaneously reacted with the relaxed semiconductor layer and with the distal portion of the contact to provide metallic contact material.

A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate electrode layer on the gate dielectric layer and between the pair of spacers, an insulating cap layer on the gate electrode layer and between the pair of spacers, and a pair of diffusion regions adjacent to the pair of spacers. The insulating cap layer forms an etch stop structure that is self aligned to the gate and prevents the contact etch from exposing the gate electrode, thereby preventing a short between the gate and contact. The insulator-cap layer enables self-aligned contacts, allowing initial patterning of wider contacts that are more robust to patterning limitations.

A semiconductor device includes a metal gate on a substrate, a polysilicon layer on the metal gate, a hard mask on the polysilicon layer, and a source/drain region adjacent to two sides of the metal gate. Preferably, the metal gate includes a ferroelectric (FE) layer on the substrate, a work function metal layer on the FE layer, and a low resistance metal layer on the work function metal layer.

By depositing a layer of metal on the semiconductor surface where the metal is deposited in a non-oxidized state first and then depositing a layer of the high-k oxide material over the layer of metal by an atomic layer deposition, a high-k metal oxide is formed at the interface between the semiconductor substrate and the high-k oxide and prevents formation of the undesirable low-k semiconductor oxide layer at the semiconductor/high-k oxide interface.

A semiconductor device includes a substrate structure. The Substrate structure includes a substrate, a plurality of fins each protruding from the substrate structure, a germanium layer on a top surface of the fins, spacers on opposite sides of the germanium layer, an oxide layer on a surface of the germanium layer between the spacers, the oxide layer comprising silicon and germanium, a high-k dielectric layer on the oxide layer and on inner sidewalls of the spacers, and a gate electrode on the high-k dielectric layer.

Methods are provided to form pure silicon oxide layers on silicon-germanium (SiGe) layers, as well as an FET device having a pure silicon oxide interfacial layer of a metal gate structure formed on a SiGe channel layer of the FET device. For example, a method comprises growing a first silicon oxide layer on a surface of a SiGe layer using a first oxynitridation process, wherein the first silicon oxide layer comprises nitrogen. The first silicon oxide layer is removed, and a second silicon oxide layer is grown on the surface of the SiGe layer using a second oxynitridation process, which is substantially the same as the first oxynitridation process, wherein the second silicon oxide layer is substantially devoid of germanium oxide and nitrogen. For example, the first silicon oxide layer comprises a SiON layer and the second silicon oxide layer comprises a pure silicon dioxide layer.

Provided is a method of fabricating a semiconductor device including the following steps. A substrate is provided. A material layer having an opening is formed on the substrate. A first passivation material layer is formed on sidewalls of the opening and on the substrate. A treatment process is performed to the first passivation material layer to form a second passivation material layer. A first surface of the second passivation material layer and a second surface (at an inner side) of the second passivation material layer are differ in a property, and the first surface is located at a side of the second passivation material layer relatively away from the material layer.

In a method of manufacturing a semiconductor device, a single crystal oxide layer is formed over a substrate. After the single crystal oxide layer is formed, an isolation structure to define an active region is formed. A gate structure is formed over the single crystal oxide layer in the active region. A source/drain structure is formed.