Methods for forming a semiconductor structure and semiconductor structures are described. The method comprises patterning a substrate to form a first opening and a second opening, the substrate comprising an n transistor and a p transistor, the first opening over the n transistor and the second opening over the p transistor; pre-cleaning the substrate; depositing a titanium silicide (TiSi) layer on the n transistor and on the p transistor by plasma-enhanced chemical vapor deposition (PECVD); optionally depositing a first barrier layer on the titanium silicide (TiSi) layer and selectively removing the first barrier layer from the p transistor; selectively forming a molybdenum silicide (MoSi) layer on the titanium silicide (TiSi) layer on the n transistor and the p transistor; forming a second barrier layer on the molybdenum silicide (MoSi) layer; and annealing the semiconductor structure. The method may be performed in a processing chamber without breaking vacuum.

Methods and apparatus for processing a substrate are provided. For example, a method includes sputtering a material from a target in a PVD chamber to form a material layer on a layer comprising a feature of the substrate, the feature having an opening width defined by a first sidewall and a second sidewall, the material layer having a greater lateral thickness at the top surface of the layer than a thickness on the first sidewall or the second sidewall within the feature, depositing additional material on the layer by biasing the layer with an RF bias at a low power, etching the material layer from the layer by biasing the layer with an RF bias at a high-power, and repeatedly alternating between the low power and the high-power at a predetermined frequency.

A method of forming nanocrystalline graphene according to an embodiment may include: arranging a substrate having a pattern in a reaction chamber; injecting a reaction gas into the reaction chamber, where the reaction gas includes a carbon source gas, an inert gas, and a hydrogen gas that are mixed; generating a plasma of the reaction gas in the reaction chamber; and directly growing the nanocrystalline graphene on a surface of the pattern using the plasma of the reaction gas at a process temperature. The pattern may include a first material and the substrate may include a second material different from the first material.

Apparatuses and methods for manufacturing semiconductor memory devices are described. An example method includes: forming a conductive layer and sputtering the conductive layer with gas. The conductive layer includes a first portion having a top surface having a first height; and a second portion having a top surface having a second height lower than the first height. Sputtering the conductive layer with gas may be performed to remove the first portion of the conductive layer and increase the second height of the second portion of the conductive layer concurrently.

A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a gate structure being provided on a surface of the substrate, and a source region and a drain region being provided in the substrate at two sides of the gate structure, respectively; and a contact located on the substrate, the contact including a first contact located on the substrate and a second contact located on a side of the first contact away from the substrate, in which an area of a bottom surface of the first contact is greater than an area of a top surface of the second contact.

A method includes forming a gate structure and an interlayer dielectric (ILD) layer over a substrate; selectively forming an inhibitor over the gate structure; performing an atomic layer deposition (ALD) process to form a dielectric layer over the ILD layer, wherein in the ALD process the dielectric layer has greater growing rate on the ILD than on the inhibitor; and performing an atomic layer etching (ALE) process to etch the dielectric layer until a top surface of the inhibitor is exposed, in which a portion of the dielectric layer remains on the ILD layer after the ALE process is complete.

In a method of manufacturing a semiconductor device, the method includes: applying a liquid material containing an ionic liquid on a substrate to form a protective film; transferring at an atmosphere the substrate on which the protective film is formed; and removing the protective film from the substrate that has been transferred at the atmosphere.

There is provided a technique that includes: (a) heating a substrate to 445° C. or more and 505° C. or less; (b) supplying a molybdenum-containing gas to the substrate; and (c) supplying a reducing gas to the substrate, wherein a molybdenum-containing film is formed on the substrate by performing (b) and (c) one or more times after performing (a).

A method of depositing a metal includes providing a structure a process chamber, and providing a metal fluoride gas and a growth-suppressant gas into the process chamber to deposit the metal over the structure. The metal may comprise a word line or another conductor of a three-dimensional memory device.

A method of depositing a metal includes providing a structure a process chamber, and providing a metal fluoride gas and a growth-suppressant gas into the process chamber to deposit the metal over the structure. The metal may comprise a word line or another conductor of a three-dimensional memory device.