The present disclosure relates a ferroelectric field-effect transistor (FeFET) device. In some embodiments, the FeFET device includes a ferroelectric layer having a first side and a second side opposite to the first side and a gate electrode disposed along the first side of the ferroelectric layer. The FeFET device further includes an OS channel layer disposed along the second side of the ferroelectric layer opposite to the first side and a pair of source/drain regions disposed on opposite sides of the OS channel layer. The FeFET device further includes a 2D contacting layer disposed along the OS channel layer. The OS channel layer has a first doping type, and the 2D contacting layer has a second doping type different than the first doping type.

A thin film transistor may be manufactured by forming a gate electrode in an insulating layer over a substrate, forming a gate dielectric over the gate electrode and the insulating layer, forming an active layer over the gate electrode, and forming a source electrode and a drain electrode contacting a respective portion of a top surface of the active layer. A surface oxygen concentration may be increased in at least one of the gate dielectric and the active layer by introducing oxygen atoms into a surface region of a respective one of the gate dielectric and the active layer.

A thin film transistor may be manufactured by forming a gate electrode in an insulating layer over a substrate, forming a gate dielectric over the gate electrode and the insulating layer, forming an active layer over the gate electrode, and forming a source electrode and a drain electrode contacting a respective portion of a top surface of the active layer. A surface oxygen concentration may be increased in at least one of the gate dielectric and the active layer by introducing oxygen atoms into a surface region of a respective one of the gate dielectric and the active layer.

A thin film transistor includes an active layer and at least one gate stack. The active layer may be formed using multiple iterations of a unit layer stack deposition process, which includes an acceptor-type oxide deposition process and a post-transition metal oxide deposition process. A surface of each gate dielectric within the at least one gate stack contacts a surface of a respective layer of the oxide of the acceptor-type element so that leakage current of the active layer may be minimized. A source electrode and a drain electrode may contact an oxide layer providing lower contact resistance such as a layer of the post-transition metal oxide or a zinc oxide layer within the active layer.

A thin film transistor includes an active layer and at least one gate stack. The active layer may be formed using multiple iterations of a unit layer stack deposition process, which includes an acceptor-type oxide deposition process and a post-transition metal oxide deposition process. A surface of each gate dielectric within the at least one gate stack contacts a surface of a respective layer of the oxide of the acceptor-type element so that leakage current of the active layer may be minimized. A source electrode and a drain electrode may contact an oxide layer providing lower contact resistance such as a layer of the post-transition metal oxide or a zinc oxide layer within the active layer.

A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. A highly reliable display device is provided. The semiconductor device is fabricated by a method that includes a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a conductive film over the semiconductor layer, a third step of etching the conductive film such that the conductive film is divided over the semiconductor layer and a portion of the semiconductor layer is uncovered, and a fourth step of performing first treatment on the conductive film and the portion of the semiconductor layer. The conductive film contains copper, silver, gold, or aluminum. The first treatment is plasma treatment in an atmosphere containing a mixed gas of a first gas containing an oxygen element and a second gas containing a hydrogen element.

A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. A highly reliable display device is provided. The semiconductor device is fabricated by a method that includes a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a conductive film over the semiconductor layer, a third step of etching the conductive film such that the conductive film is divided over the semiconductor layer and a portion of the semiconductor layer is uncovered, and a fourth step of performing first treatment on the conductive film and the portion of the semiconductor layer. The conductive film contains copper, silver, gold, or aluminum. The first treatment is plasma treatment in an atmosphere containing a mixed gas of a first gas containing an oxygen element and a second gas containing a hydrogen element.

An electrode with multiple metallic-layers structure formed by a magnetron sputtering technique for a semiconductor device and method for producing same is disclosed. The ceramic device includes at least one from selected group consisting of ZnO-MOV (metal oxide varistors), BaTiO3-PTC (positive temperature coefficient) thermistors, Mn3O4-NTC (negative temperature coefficient) thermistors, and capacitors. The multiple metallic-layers include a sputtered buffer layer and a sputtered electrical contact layer. The buffer layer includes at least one alloy selected form group consisting of NiCr (Ni from 50-90 wt %), TiNi (Ti from 40-60 wt %), and AlNi (Al from 40-70 wt %) and the thickness of this layer is from greater than zero to less than 100 nm. The electrical contact layer includes at least one of Cu, Ag, Pt, Au, or combination. More specifically, the electrode includes one of NiCr/Cu system, NiCr/Ag system, NiCr/Cu/Ag system, TiNi/Cu/Ag system, or AlNi/Cu/Ag system. The thickness ratio of the electrical contact layer to the intermetallic barrier layer is from 1 to 4.

An electrode with multiple metallic-layers structure formed by a magnetron sputtering technique for a semiconductor device and method for producing same is disclosed. The ceramic device includes at least one from selected group consisting of ZnO-MOV (metal oxide varistors), BaTiO3-PTC (positive temperature coefficient) thermistors, Mn3O4-NTC (negative temperature coefficient) thermistors, and capacitors. The multiple metallic-layers include a sputtered buffer layer and a sputtered electrical contact layer. The buffer layer includes at least one alloy selected form group consisting of NiCr (Ni from 50-90 wt %), TiNi (Ti from 40-60 wt %), and AlNi (Al from 40-70 wt %) and the thickness of this layer is from greater than zero to less than 100 nm. The electrical contact layer includes at least one of Cu, Ag, Pt, Au, or combination. More specifically, the electrode includes one of NiCr/Cu system, NiCr/Ag system, NiCr/Cu/Ag system, TiNi/Cu/Ag system, or AlNi/Cu/Ag system. The thickness ratio of the electrical contact layer to the intermetallic barrier layer is from 1 to 4.

An object is to provide a technology for enabling prevention of deterioration of characteristics of an oxide semiconductor device. The oxide semiconductor device includes an n-type gallium oxide epitaxial layer, a p-type oxide semiconductor layer, and an oxide layer. The p-type oxide semiconductor layer is disposed above the n-type gallium oxide epitaxial layer, contains an element different from gallium as a main component, and has p-type conductivity. The oxide layer is disposed between the n-type gallium oxide epitaxial layer and the p-type oxide semiconductor layer, and is made of a material different from gallium oxide and different at least partly from a material of the p-type oxide semiconductor layer.