According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, a nitride layer, and an oxide layer. A direction from the second electrode toward the first electrode is aligned with a first direction. A position in the first direction of the third electrode is between the first electrode and the second electrode in the first direction. The first semiconductor layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions in the first direction. The second partial region is between the third and fifth partial regions in the first direction. The nitride layer includes first and second nitride regions. The second semiconductor layer includes first and second semiconductor regions. The oxide layer includes silicon and oxygen. The oxide layer includes first to third oxide regions.

There is provided a cleaning technique that includes supplying a hydrogen fluoride gas into a process vessel, in which a process of forming an oxide film containing at least one of carbon and nitrogen on a substrate has been performed, to remove a deposit containing at least one of carbon and nitrogen adhered to an interior of the process vessel, wherein the act of supplying the hydrogen fluoride gas is performed under a condition in which an etching rate of the deposit adhered to the interior of the process vessel is higher than an etching rate of a quartz member in the process vessel.

Method of manufacturing a photovoltaic module comprising at least a first layer and a second layer affixed to each other by means of an encapsulant, said method comprising a lamination step wherein the encapsulant material comprises a silane-modified polyolefin having a melting point below 90° C., pigment particles and an additive comprising a cross-linking catalyst; and wherein in said lamination step heat and pressure are applied to the module, said heat being applied at a temperature between 60° C. and 125° C.

Disclosed are a fluororesin interfacial agent for LED packaging, and a method for preparing and using the same. The fluororesin interfacial agent for LED packaging comprises a graphene oxide fluororesin sealant and KH550 silane coupling agent solution. Graphene oxide powder in the graphene oxide fluororesin sealant chemically reacts with the KH550 silane coupling agent, and molecular crosslinking is formed, which tightly fixes a bonding interface and a fluororesin matrix like countless molecular anchors, and which greatly improves the bonding capability of fluororesin sealant and ensures the reliability of LED packaging.

An organic light emitting display device includes a substrate, a buffer layer, an active layer, a gate insulation layer, a protective insulating layer, a gate electrode, an insulating interlayer, source and drain electrodes, and a sub-pixel structure. The buffer layer is disposed on the substrate. The active layer is disposed on the buffer layer, and has a source region, a drain region, and a channel region. The gate insulation layer is disposed in the channel region on the active layer. The protective insulating layer is disposed on the buffer layer, the source and drain regions of the active layer, and the gate insulation layer. The gate electrode is disposed in the channel region on the protective insulating layer. The insulating interlayer is disposed on the gate electrode. The source and drain electrodes are disposed on the insulating interlayer.

An organic light emitting display device includes a substrate, a buffer layer, an active layer, a gate insulation layer, a protective insulating layer, a gate electrode, an insulating interlayer, source and drain electrodes, and a sub-pixel structure. The buffer layer is disposed on the substrate. The active layer is disposed on the buffer layer, and has a source region, a drain region, and a channel region. The gate insulation layer is disposed in the channel region on the active layer. The protective insulating layer is disposed on the buffer layer, the source and drain regions of the active layer, and the gate insulation layer. The gate electrode is disposed in the channel region on the protective insulating layer. The insulating interlayer is disposed on the gate electrode. The source and drain electrodes are disposed on the insulating interlayer.

The present application discloses a display panel. The display panel includes a base substrate; a display unit on the base substrate; and an encapsulating layer on a side of the display unit distal to the base substrate and encapsulating the display unit. The encapsulating layer includes a first inorganic encapsulating layer on a side of the display unit distal to the base substrate; and a first organic encapsulating layer and a second organic encapsulating layer on a side of the first inorganic encapsulating layer distal to the display unit. Each of the first organic encapsulating layer and the second organic encapsulating layer is in contact with the first inorganic encapsulating layer. The first organic encapsulating layer has a Young's modulus lower than that of the second organic encapsulating layer.

The present disclosure discloses a method for preparing an isolation area of a gallium oxide device, the method comprising: depositing a mask layer on a gallium oxide material; removing a preset portion region of the mask layer; preparing an isolation area in a position, corresponding to the preset portion region, on the gallium oxide material by using a high-temperature oxidation technique, with the isolation area being located between active areas of the gallium oxide device; and removing the remaining mask layer on the gallium oxide material. In the disclosure, the isolation area is prepared by using the high-temperature oxidation technique, which prevents damage to the gallium oxide device during the preparation of the isolation area, thereby achieving isolation between the active areas of the gallium oxide device.

An optical device includes a gallium and nitrogen containing substrate comprising a surface region configured in a (20-2-1) orientation, a (30-3-1) orientation, or a (30-31) orientation, within +/10 degrees toward c-plane and/or a-plane from the orientation. Optical devices having quantum well regions overly the surface region are also disclosed.

A semiconductor device is disclosed including a stack of semiconductor die. Openings are formed in the semiconductor die as they are added to the stack, which openings are aligned at different levels of the stack. The openings are filled with an electrically insulative compound to form a molded column through all semiconductor die in the stack. After all semiconductor die are added to the stack, a via may be drilled through the molded column to electrically interconnect each semiconductor die in the stack.