Patent classifications
H01L21/4828
Semiconductor device and corresponding method
Methods of forming a semiconductor device comprising a lead-frame having a die pad having at least one electrically conductive die pad area and an insulating layer applied onto the electrically conductive die pad area. An electrically conductive layer is applied onto the insulating layer with one or more semiconductor dice coupled, for instance adhesively, to the electrically conductive layer. The electrically conductive die pad area, the electrically conductive layer and the insulating layer sandwiched therebetween form at least one capacitor integrated in the device. The electrically conductive die pad area comprises a sculptured structure with valleys and peaks therein; the electrically conductive layer comprises electrically conductive filling material extending into the valleys in the sculptured structure of the electrically conductive die pad area.
Universal surface-mount semiconductor package
A variety of footed and leadless semiconductor packages, with either exposed or isolated die pads, are described. Some of the packages have leads with highly coplanar feet that protrude from a plastic body, facilitating mounting the packages on printed circuit boards using wave-soldering techniques.
Flip chip curved sidewall self-alignment features for substrate and method for manufacturing the self-alignment features
Methods and system for flip chip alignment for substrate and leadframe applications are disclosed and may include placing a semiconductor die on bond fingers of a metal leadframe, wherein at least two of the bond fingers comprise one or more recessed self-alignment features. A reflow process may be performed on the semiconductor die and leadframe, thereby melting solder bumps on the semiconductor die such that a solder bump may be pulled into each of the recessed self-alignment features and aligning the solder bumps on the semiconductor die to the bond fingers. The recessed self-alignment features may be formed utilizing a chemical etch process or a stamping process. A surface of the recessed self-alignment features or the bond fingers of the metal leadframe may be roughened. A solder paste may be formed in the recessed self-alignment features prior to placing the semiconductor die on the bond fingers of the metal leadframe.
SEMICONDUCTOR DEVICE WITH WIRE BOND AND METHOD FOR PREPARING THE SAME
A semiconductor device includes a semiconductor substrate having a bonding pad, and a first dielectric layer disposed over the semiconductor substrate. A portion of the bonding pad is exposed by the first dielectric layer. The semiconductor device also includes a metal oxide layer disposed over the portion of the bonding pad, and a wire bond penetrating through the metal oxide layer to bond to the bonding pad. The portion of the bonding pad is entirely covered by the metal oxide layer and the wire bond.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
A semiconductor device includes: a semiconductor element that includes an element main body having an element main surface and an element back surface facing opposite sides to each other in a thickness direction, and a first electrode arranged on the element main surface; an insulator that has an annular shape overlapping an outer peripheral edge of the first electrode when viewed in the thickness direction and is arranged over the first electrode and the element main surface; a first metal layer arranged over the first electrode and the insulator; and a second metal layer laminated on the first metal layer and overlapping both the first electrode and the insulator when viewed in the thickness direction.
DIE ATTACH ADHESIVE-READY LEAD FRAME DESIGN
An integrated circuit package includes a die attach pad and a plurality of conductors formed from a lead frame material. A cavity is formed in a top surface of the die attach pad. A die attach adhesive is disposed within the cavity. A top surface of the die attach adhesive is flush with the top surface of the die attach pad. A semiconductor die is mounted on the die attach pad using the die attach adhesive. The semiconductor die is electrically connected to the plurality of conductors through a set of bond wires. A bottom surface of the semiconductor die is coplanar with the top surface of the die attach pad. A molding compound covers portions of the lead frame, the semiconductor die, and the set of bond wires.
LEAD FRAME, METHOD OF MAKING LEAD FRAME, SEMICONDUCTOR APPARATUS, AND METHOD OF MAKING SEMICONDUCTOR APPARATUS
A lead frame including a die pad having a first surface and a second surface opposite the first surface, a lead having a third surface flush with the first surface and a fourth surface opposite the third surface, and a link portion connecting the die pad and the lead, wherein the link portion includes a first portion that surrounds the die pad between the die pad and the lead in a plan view, wherein the first portion has a fifth surface flush with the first surface and the third surface, and has a sixth surface opposite the fifth surface, wherein the second surface is closer to a plane containing the first surface, the third surface, and the fifth surface than is the fourth surface, and wherein the sixth surface is closer to the plane containing the first surface, the third surface, and the fifth surface than is the second surface.
LEAD FRAME, CHIP PACKAGE STRUCTURE, AND MANUFACTURING METHOD THEREOF
A method of forming a lead frame can include: providing a frame base; providing a substrate to support the frame base; and selectively etching the frame base to form first and second type pins. The first type pins are distributed in the central area of the lead frame, and the second type of the pins are distributed in the edge area of the lead frame. The first type pins are separated from the second type of the pins, and the first and second type pins are not connected by connecting bars. A pattern of a first surface of the first and second type pins is different from that of a second surface of the first and second type pins. The metal of the first surface is different from the metal of the second surface, and the second surface is opposite to the first surface.
Wiring substrate, method of manufacturing the same and electronic component device
A wiring substrate includes an electronic component mounting pad, an electrode pad arranged at an outer side of the electronic component mounting pad, a first insulation layer formed on the electronic component mounting pad and the electrode pad, an opening formed in the first insulation layer on the electronic component mounting pad, a connection hole formed in the first insulation layer on the electrode pad, and recess portions formed at the electronic component mounting pad in the opening and at the electrode pad in the connection hole, respectively.
ELECTRONIC COMPONENT APPARATUS HAVING A FIRST LEAD FRAME AND A SECOND LEAD FRAME AND AN ELECTRONIC COMPONENT PROVIDED BETWEEN THE FIRST LEAD FRAME AND THE SECOND LEAD FRAME
An electronic component includes: a first lead frame; a second lead frame that is provided on the first lead frame; a first electronic component that is provided between the first lead frame and the second lead frame; a connection member that is provided between the first lead frame and the second lead frame; and an insulating resin that is filled between the first lead frame and the second lead frame so as to cover the first electronic component and the connection member. A first oxide film is provided on a surface of the first lead frame. A second oxide film is provided on a surface of the second lead frame. The first lead frame and the second lead frame are electrically connected to each other by the connection member.