Provided are a method for fabricating a semiconductor package and a semiconductor package using the same, which can simplify a fabricating process of the semiconductor package by forming a lead frame on which a semiconductor die can be mounted without a separate grinding process, and can improve product reliability by preventing warpage from occurring during a grinding process. In one embodiment, the method for fabricating a semiconductor package includes forming a frame on a carrier, forming a first pattern layer on the frame, first encapsulating the frame and the first pattern layer using a first encapsulant, forming conductive vias electrically connected to the first pattern layer while passing through the first encapsulant, forming a second pattern layer electrically connected to the conductive vias on the first encapsulant, forming a first solder mask formed on the first encapsulant and exposing a portion of the second pattern layer to the outside, removing the frame by an etching process and etching a portion of the first pattern layer, and attaching a semiconductor die to the first pattern layer.

Leadframes for semiconductor devices are manufactured by providing a laminar substrate of laser direct structuring material, the laminar substrate comprising first and second opposed surfaces, applying laser beam processing to the substrate to provide a first pattern of electrically-conductive formations at the first surface, a second pattern of electrically-conductive formations at the second surface and electrically-conductive vias through the substrate between the first surface and the second surface. Electrically-conductive material is formed, for instance via electrolytic or electroless growth of electrically-conductive material such a copper onto the first and second pattern of electrically-conductive formations as well as onto the electrically-conductive vias provided by applying laser beam processing to the substrate. The electrically-conductive vias are coupled to one or both of the electrically-conductive formations in the first pattern of electrically-conductive formations and the second pattern of electrically-conductive formations.

Disclosed are a power module and a method for manufacturing the same. A power module according to an embodiment of the present disclosure includes: a first substrate; a second substrate disposed spaced apart from the first substrate and including at least one metal layer; at least one chip disposed between the first substrate and the second substrate and in electrical contact with the metal layer; and a third substrate configured to be disposed spaced apart from the first substrate and the second substrate, electrically connect the chip and at least one external input terminal, include one or more conductive patterns each of which is connected to one of the at least one lead frame, and be formed in a multi-layer structure such that the one or more conductive patterns are not short-circuited to each other.

A power module includes an interconnect of an integrated circuit (IC) package having a heat slug. The power module also includes a direct bonded copper (DBC) substrate. The DBC substrate has a first surface formed of pattern copper, the patterned copper has a pad and a second surface that opposes the first surface, the second surface has a sheet of copper. The second surface of the DBC substrate is thermally coupled to the heat slug. The power module further includes a die mounted on the pad of the first surface of the DBC substrate. The die has a power transistor. The die and the heat slug are thermally coupled and electrically isolated.

Techniques and devices are disclosed for forming wettable flanks on no-leads semiconductor packages. A lead frame assembly may include a plurality of leads, each lead including a die surface and a plating surface, and an integrated circuit die arranged on the die surface. The plating surface for each of the leads may be plated with an electrical plating. A connecting film may be applied and lead frame assembly may be singulated into individual semiconductor packages by a series of cuts through each of the plurality of leads and the electrical plating of each of the plurality of leads to a depth up to or through a portion of the connecting film to create a channel exposing lead sidewalls of each of the plurality of leads. The lead sidewalls of each of the plurality of leads may be plated with a second electrical plating and the connecting film may be removed.

Leadframes for semiconductor devices are manufactured by providing a laminar substrate of laser direct structuring material, the laminar substrate comprising first and second opposed surfaces, applying laser beam processing to the substrate to provide a first pattern of electrically-conductive formations at the first surface, a second pattern of electrically-conductive formations at the second surface and electrically-conductive vias through the substrate between the first surface and the second surface. Electrically-conductive material is formed, for instance via electrolytic or electroless growth of electrically-conductive material such a copper onto the first and second pattern of electrically-conductive formations as well as onto the electrically-conductive vias provided by applying laser beam processing to the substrate. The electrically-conductive vias are coupled to one or both of the electrically-conductive formations in the first pattern of electrically-conductive formations and the second pattern of electrically-conductive formations.

A mold die includes a resin injection gate through which fluid resin serving as mold resin is injected toward a cavity, a resin reservoir to store the fluid resin flowing through the cavity, and a resin reservoir gate. The resin reservoir is provided on the side opposite to the side on which the resin injection gate is arranged with the cavity interposed. The resin reservoir gate communicatively connects the cavity and the resin reservoir. The opening cross-sectional area of the resin reservoir gate is smaller than the opening cross-sectional area of the resin injection gate.

Techniques and devices are disclosed for forming wettable flanks on no-leads semiconductor packages. A lead frame may include a plurality of lead sets, each lead set including leads having a die surface and a plating surface, vias between adjacent lead sets in a first direction, and an integrated circuit die arranged on the die surface of each die lead. A mold chase may be applied to the plating surfaces, the mold chase including mold chase extensions extending into the vias between each adjacent lead set in the first direction, each mold chase extension having a peak surface. The lead frame assembly may be partially embedded in a mold encapsulation such that portions of the mold encapsulation contact the peak surfaces. The mold chase may be removed to expose the vias containing sidewalls and the plating surfaces and the sidewalls may be plated with an electrical plating.

A lead frame includes a die paddle and a plurality of leads. The leads surround the die paddle. Each of the leads includes an inner lead portion and an outer lead portion connecting to the inner lead portion. The inner lead portion is adjacent to and spaced apart from the die paddle. A bottom surface of the inner lead portion is higher than a bottom surface of the outer lead portion. The bottom surface of the inner lead portion includes one or more supporting members disposed thereon. The one or more supporting members have a convex surface facing away from the inner lead portion.

A package is disclosed. In one example, the package comprises a carrier, an electronic component mounted on the carrier, and an encapsulant encapsulating at least part of the electronic component and only part of the carrier so that another exposed part of the carrier is exposed with regard to the encapsulant. The exposed part of the carrier comprises an electric connection structure and a corrosion protection structure. One of the electric connection structure and the corrosion protection structure is selectively formed on only a sub-portion of the other one of the electric connection structure and the corrosion protection structure outside of the encapsulant.