A component carrier includes a carrier body formed of a plurality of electrically conductive layer structures and/or electrically insulating layer structures, a metal surface structure coupled to the layer structures and a metal body directly on the metal surface structure formed by additive manufacturing.

A package structure includes a first semiconductor die, a first insulating encapsulation, a thermal coupling structure, and a heat dissipating component thermally coupled to the first semiconductor die through the thermal coupling structure. The first semiconductor die includes an active side, a rear side, and a sidewall connected to the active side and the rear side. The first insulating encapsulation extends along the sidewall of the first semiconductor die and includes a first side substantially leveled with the active side, a second side opposite to the first side, and topographic features at the second side. The thermal coupling structure includes a metallic layer overlying and the rear side of the first semiconductor die and the topographic features of the first insulating encapsulation. A manufacturing method of a package structure is also provided.

A sheet-shaped member 440 including a resin insulating layer 441 and a metal foil 442 is used. The sheet-shaped member 440 is deformed following warpage or step difference in a second conductor plate 431 and a fourth conductor plate 433, and therefore, the thickness of the resin insulating layer 441 can be set to a constant thickness of, for example, 120 μm capable of securing insulation properties. By plastically deforming a metal-based heat conduction member 450 having a thickness of, for example, 120 μm interposed between the sheet-shaped member 440 and a cooling member 340, the thickness of the metal-based heat conduction member 450 is changed to absorb the warpage or step difference generated in the second conductor plate 431 and the fourth conductor plate 433. This results in remarkable improvement in heat dissipation as compared with a case where the conductor plates are brought into contact with the cooling member 340 via an insulating layer alone.

An electronic package is provided and includes an electronic element, an intermediary structure disposed on the electronic element, and a heat dissipation element bonded to the electronic element through the intermediary structure. The intermediary structure has a flow guide portion and a permanent fluid combined with the flow guide portion so as to be in contact with the electronic element, thereby achieving a preferred heat dissipation effect and preventing excessive warping of the electronic element or the heat dissipation element due to stress concentration.

A chip module with heat dissipation device includes device includes a chip unit, a heat dissipation body and a plurality of metal connecting elements. The heat dissipation body is disposed on the chip unit. The plurality of metal connecting elements formed by ultrasonic bonding are disposed between the chip unit and the heat dissipation body to connect the chip unit to the heat dissipation body.

A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.

A semiconductor die package and a method of forming the same are provided. The semiconductor die package includes a package substrate, and a first semiconductor die and a second semiconductor die disposed thereon. A ring structure is attached to the package substrate and surrounds the semiconductor dies. A lid structure is attached to the ring structure and disposed over the semiconductor dies, and has an opening exposing the second semiconductor die. A heat sink is disposed over the lid structure and has a portion extending into the opening of the lid structure. A first thermal interface material (TIM) layer is interposed between the lid structure and the first semiconductor die. A second TIM layer is interposed between the extending portion of the heat sink and the second semiconductor die. The first TIM layer has a thermal conductivity higher than the thermal conductivity of the second TIM layer.

The disclosure relates to a flow-rate adjustment component and a liquid cooling device. The flow-rate adjustment component is configured to be in contact with a plurality fins, and every two adjacent fins are spaced by a passageway. The flow-rate adjustment component includes a covering portion and at least one blocking portion. The covering portion has at least one through slot. The covering portion is in contact with the fins to cover the passageways. The through slot is connected to the passageways. The at least one blocking portion is to block one end of at least one of the passageways.

An electronic device includes a printed circuit board (PCB) that supports an integrated circuit (IC) chip. The device also includes a lid over the IC chip. A thermal interface material (TIM) is configured to transfer thermal energy from the IC chip to the lid. A heat spreader forms a cavity in communication with the lid. The heat spreader is at least partially filled with a liquid that is configured to change phases during operation of the IC chip.

A cost-effective process and structure is provided for a thermal dissipation element for semiconductor device packages incorporating antennas that can incorporate RF/EMI shielding from the antenna elements. Certain embodiments provide incorporated antenna element structures as part of the same process. These features are provided using a selectively-plated thermal dissipation structure that is formed to provide shielding around semiconductor device dies that are part of the package. In some embodiments, the thermal dissipation structure is molded to the semiconductor device, thereby permitting a thermally efficient close coupling between a device die requiring thermal dissipation and the dissipation structure itself.