A method for forming a semiconductor device with an electromagnetic interference shield is disclosed and may include coupling a semiconductor die to a first surface of a substrate, encapsulating the semiconductor die and portions of the substrate using an encapsulant, placing the encapsulated substrate and semiconductor die on an adhesive tape, and forming an electromagnetic interference (EMI) shield layer on the encapsulant, on side surfaces of the substrate, and on portions of the adhesive tape adjacent to the encapsulated substrate and semiconductor die. The adhesive tape may be peeled away from the encapsulated substrate and semiconductor die, thereby leaving portions of the EMI shield layer on the encapsulant and on the side surfaces of the substrate with other portions of the EMI shield layer remaining on portions of the adhesive tape. Contacts may be formed on a second surface of the substrate opposite to the first surface of the substrate.

A cover for an integrated circuit package includes a central plate and a peripheral frame surrounding the central plate. The peripheral frame is vertically spaced from and parallel to the central plate. The peripheral frame includes through openings formed therein. The cover can be used to package a semiconductor chip that is mounted to a substrate.

According to one embodiment, a semiconductor device includes a mounting board having a first surface on which a plurality of semiconductor chips is mounted. The first surface of the mounting board is provided with a frame that encloses peripheries of the plurality of semiconductor chips, and the frame is to be filled with filler. The mounting board has a second surface that is opposite to the first surface, and a plurality of connection terminals is formed on the second surface.

A leadframe includes a common contact. A first transistor is disposed over the leadframe with a first interconnect structure of the first transistor disposed over the common contact. A second transistor is disposed over the leadframe with a second interconnect structure of the second transistor disposed over the common contact.

A method of bonding a terminal of a semiconductor chip using a solder bump includes preparing a semiconductor chip with an aluminum (Al) pad terminal formed thereon (S-1), forming a solder bump on the Al pad terminal through a primary solder (S-2), attaching the solder bump and a metal structure to each other via a secondary solder with a higher melting point than a melting point of the primary solder (S-3), performing heat treatment in an attachment state (S-4), and mixing the primary solder and the secondary solder that are melted during the heat treatment and converting a resulting mixture into a tertiary solder including one solder layer (S-4).

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.

A cover for an integrated circuit package includes a central plate and a peripheral frame surrounding the central plate. The peripheral frame is vertically spaced from and parallel to the central plate. The peripheral frame includes through openings formed therein. The cover can be used to package a semiconductor chip that is mounted to a substrate.

A method for printing a micro line pattern using inkjet printing, includes: a bump forming process for forming a micro bump that sections a predetermined conductive pattern by inkjet-printing a quick drying liquid on a substrate; and a pattern printing process for printing a conductive pattern according to the predetermined conductive pattern by inkjet-printing a conductive liquid on an area sectioned by the micro bump.

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.

A chip package structure includes a redistribution layer, at least one chip, a reinforcing frame, an encapsulant and a plurality of solder balls. The redistribution layer includes a first surface and a second surface opposite to each other. The chip is disposed on the first surface and electrically connected to the redistribution layer. The reinforcing frame is disposed on the first surface and includes at least one through cavity. The chip is disposed in the through cavity and a stiffness of the reinforcing frame is greater than a stiffness of the redistribution layer. The encapsulant encapsulates the chip, the reinforcing frame and covering the first surface. The solder balls are disposed on the second surface and electrically connected to the redistribution layer.