A technique of improving an adhesion between a metal precipitated in a recess of a substrate and a surface partitioning the recess in an electroless plating processing in which a plated metal is deposited from the bottom of the recess is provided. A substrate liquid processing method includes preparing a substrate including a recess and a wiring exposed at a bottom of the recess; forming a self-assembled monolayer on a side wall of the recess; attaching an intermolecular binder, which is allowed to be bonded to both a metal and the self-assembled monolayer, to the self-assembled monolayer; and burying, by supplying an electroless plating solution to the recess in a state where the intermolecular binder is attached to the self-assembled monolayer to precipitate the metal in the recess, the metal in the recess while bringing the metal into close contact with the intermolecular binder.

The present disclosure provides a semiconductor structure, a forming method thereof, and a semiconductor device, and relates to the technical field of semiconductor packaging processes. The method includes: providing a semiconductor substrate; forming an oxide layer on a surface of the semiconductor substrate, and etching the oxide layer to form a recess, where a through-silicon via (TSV) is provided in the semiconductor substrate and the oxide layer, and an upper end of the TSV is connected to the recess; depositing a metal layer on a surface of the recess, and forming an opening in the metal layer on a bottom surface of the recess, where the opening is connected to the TSV; and filling a second conductive material into the recess, and forming a hole in the second conductive material above the opening.

A semiconductor device including: a semiconductor substrate including an active region; a plurality of conductive structures formed over the semiconductor substrate; an isolation layer filling a space between the conductive structures and having an opening that exposes the active region between the conductive structures; a pad formed in a bottom portion of the opening and in contact with the active region; a plug liner formed conformally over a sidewall of the opening and exposing the pad; and a contact plug formed over the pad inside the opening,

Methods of forming patterned features on a surface of a substrate are disclosed. Exemplary methods include gas-phase formation of a layer comprising an oxalate compound on a surface of the substrate. Portions of the layer comprising the oxalate compound can be exposed to radiation or active species that form exposed and unexposed portions. Material can be selectively deposed onto the exposed or the unexposed portions.

A system substrate package, a system package, and methods of forming the same are described herein. The system substrate package includes an integrated substrate with multiple discrete interconnect structures. In embodiments the multiple discrete interconnect structures are placed and encapsulated and have a gap formed between the multiple discrete interconnect structures. The system substrate package reduces package warpage and mitigates board level reliability issues.

Semiconductor structure and its fabrication method are provided. The method includes providing a substrate, where the substrate includes a first region having a first metal structure and a second region having a second metal structure; forming a device layer on each of top surfaces of the substrate, the first metal structure and the second metal structure; forming a first through hole in the device layer at the first region, where the first through hole exposes at least a portion of surfaces of the first metal structure, and forming a second through hole in the device layer at the second region, where the second through hole passes through the first device and exposes at least a portion of surfaces of the second metal structure; and using a selective metal growth process, forming a first plug in the first through hole and forming a second plug in the second through hole.

Provided herein are methods for forming a layer on a substrate wherein the layer is formed selectively on a first region of the substrate relative to a second region having a composition different than the first region. Methods of the invention include selectively forming a layer using an inhibitor agent capable of reducing the average acidity of a first region of the substrate having a composition characterized by a plurality of hydroxyl groups. Methods of the invention include selectively forming a layer by exposure of the substrate to: (i) an inhibitor agent comprising a substituted or an unsubstituted amine group, a substituted or an unsubstituted pyridyl group, a carbonyl group, or a combination of these, and (ii) a precursor gas comprising one or more ligands selected from the group consisting of a carbonyl group, an allyl group, combination thereof.

Method for filling a gap, comprising providing in a deposition chamber a semiconductor substrate having a gap, wherein a bottom of the gap includes a crystalline semiconducting material and wherein a side wall of the gap includes an amorphous material; depositing a silicon precursor in the gap.

Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes a substrate and nanostructures suspended over the substrate. The semiconductor structure also includes a gate structure wrapping around the nanostructures and a source/drain structure attached to the nanostructures. The semiconductor structure also includes a contact vertically over the source/drain structure and a first conductive structure vertically over the gate structure. The semiconductor structure also includes a second conductive structure in contact with a top surface of the first conductive structure and a top surface of the contact and including an extending portion laterally sandwiched between the first conductive structure and the contact.

The present disclosure provides a method of forming a semiconductor device structure. The method includes forming a trench in a dielectric layer on a semiconductor substrate; forming a bottom metal feature of a first metal in a lower portion of the trench by a selective deposition; depositing a barrier layer in an upper portion of the trench, the barrier layer directly contacting both a top surface of the bottom metal feature and sidewalls of the dielectric layer; and forming a top metal feature of a second metal on the barrier layer, filling in the upper portion of the trench, wherein the second metal is different from the first metal in composition.