Patent classifications
H01L23/49551
LED holder, LED module and method for manufacturing LED holder
The application relates to an LED module, an LED holder, and a method for manufacturing the LED holder. The LED holder includes an insulating carrier and a lead frame. The insulating carrier includes a first sidewall, a second sidewall opposite to the first sidewall, and a partition portion positioned between the first sidewall and the second sidewall. The lead frame includes a first electrode and a second electrode positioned at two sides of the partition portion respectively. The first electrode includes a first bottom portion and a first wing portion obliquely connected with the first bottom portion. The second electrode includes a second bottom portion and a second wing portion obliquely connected with the second bottom portion. The LED holder can improve the reflectivity of the insulating carrier and can prevent the insulating carrier from aging.
POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A power semiconductor device includes a power semiconductor element, a controlling element, a first lead frame and a second lead frame, respectively, a first metal wire electrically connecting the power semiconductor element and the first lead frame, and a sealing body covering these components. The first lead frame includes a first inner lead having a connecting surface to which one end of the first metal wire is connected. Among surfaces of the sealing body, in a side surface, a resin inlet mark is formed in a side surface portion from which the first lead frame and the second lead frame do not project, the resin inlet mark being greater in surface roughness than another area. The resin inlet mark is formed opposite to a side where the first metal wire is positioned on the connecting surface when seen in the direction along the mounting surface.
MICROELECTRONIC PACKAGES HAVING STACKED DIE AND WIRE BOND INTERCONNECTS
A microelectronic package includes at least one microelectronic element having a front surface defining a plane, the plane of each microelectronic element parallel to the plane of any other microelectronic element. An encapsulation region overlying edge surfaces of each microelectronic element has first and second major surfaces substantially parallel to the plane of each microelectronic element and peripheral surfaces between the major surfaces. Wire bonds are electrically coupled with one or more first package contacts at the first major surface of the encapsulation region, each wire bond having a portion contacted and surrounded by the encapsulation region. Second package contacts at an interconnect surface being one or more of the second major surface and the peripheral surfaces include portions of the wire bonds at such surface, and/or electrically conductive structure electrically coupled with the wire bonds.
CURABLE HEAT RADIATION COMPOSITION
The present invention relates to a curable heat radiation composition which includes two types of fillers with different compressive breaking strengths (except when the two types of fillers are the same substance) and a thermosetting resin, the compressive breaking strength ratio of the two types of fillers [compressive breaking strength of a filler (A) with a higher compressive breaking strength/compressive breaking strength of a filler (B) with a lower compressive breaking strength] being 5 to 1,500, the compressive breaking strength of the filler (A) being 100 to 1,500 MPa, and the compressive breaking strength of the filler (B) being 1.0 to 20 MPa, an adhesive sheet using the composition and a method for producing the same. An aluminum nitride is preferable as the filler (A) and hexagonal boron nitride agglomerated particles are preferable as the filler (B).
SEMICONDUCTOR DEVICE AND ANTENNA DEVICE
A semiconductor device according to the present invention includes: a semiconductor element; a first metal body having a die pad to which the semiconductor element is mounted, the semiconductor element being mounted on a die bond surface of the die pad; a second metal body which has a wire bond pad connected to a signal electrode of the semiconductor element via a wire, and is provided on the same side as the die bond surface such that the second metal body is separated from the first metal body and covered by the first metal body, the second metal body forming a transmission line together with the first metal body; and a molding resin holding the first metal body and the second metal body such that a surface of the first metal body opposite to the die bond surface is exposed.
Semiconductor Device Having Compliant and Crack-Arresting Interconnect Structure
A power converter (300) has a first transistor chip (310) conductively stacked on top of a second transistor chip (320) attached to a substrate (301). A first metallic clip (360) has a plate portion (360a) and a ridge portion (360c) bent at an angle from the plate portion. The plate portion is attached to the terminal of the first transistor chip opposite the second transistor chip. The ridge portion extends to the substrate is and is configured as a plurality of parallel straight fingers (360d). Each finger is discretely attached to the substrate using attachment material (361), for instance solder, and operable as a spring-line cantilever to accommodate, under a force lying in the plane of the substrate, elastic elongation based upon inherent material characteristics.
Circuit device and method for the production thereof
A circuit device has a base plate, a first substrate arranged on a first outer side of the base plate, a second substrate arranged on a second outer side opposite the first outer side of the base plate, at least one electrical connection element that electrically connects the first substrate and the second substrate, at least one electronic component arranged on or in the first substrate, at least one electronic component arranged on or in the second substrate, a mold package molded around the two substrates and the electronic components arranged thereon, and at least one contacting element for electrically contacting the first substrate and/or the second substrate. The at least one contacting element is electrically conductively connected to the first substrate and/or the second substrate and is led out from the mold package.
Packaging structure
A packaging structure includes a lead frame, a chip, and a packaging material. The lead frame has a pair of opposed first surface and second surface, and has a first recessed region located on the second surface. The chip has a pair of opposed first surface and second surface. The first surface of the chip is fixed on the first recessed region. The packaging material surrounds the lead frame and the chip. The second surface of the chip is exposed from the packaging material, and the first surface of the lead frame is exposed from the packaging material.
Molding type power module
A molding type power module includes: a leadframe including a first step and a second step; a first planar power device including a first surface having electrodes and a second surface opposite to the first surface, the electrodes being correspondingly bond to the first step respectively; and a second planar power device including a first surface having electrodes and a second surface opposite to the first surface, the electrodes being correspondingly bond to the second step respectively, wherein, the first surface of the first planar power device and the first surface of the second planar power device face each other, the projected areas thereof on a vertical direction at least partially overlap, and the first planar power device at least has one electrode electronically connected with the electrodes of the second planar power device.
SEMICONDUCTOR DEVICE
A semiconductor device includes a substrate, a semiconductor element, a terminal and a solder outflow prevention part. The semiconductor element is fixed on one side of the substrate via a first solder layer. The terminal that is fixed on the one side of the substrate via a second solder layer. The solder outflow prevention part is formed between the semiconductor element and the terminal in the one side of the substrate and is configured to prevent the first solder layer and the second solder layer from outflowing. A distance between the solder outflow prevention part and the semiconductor element is longer than a thickness of the first solder layer.