H01L29/6625

Germanium lateral bipolar transistor with silicon passivation

Semiconductor structure including germanium-on-insulator lateral bipolar junction transistors and methods of fabricating the same generally include formation of a silicon passivation layer at an interface between the insulator layer and a germanium layer.

III-V LATERAL BIPOLAR JUNCTION TRANSISTOR
20170294525 · 2017-10-12 ·

A lateral bipolar junction transistor (LBJT) device that includes an intrinsic III-V semiconductor material having a first band gap; and a base region present on the intrinsic III-V semiconductor material. The base region is composed of an III-V semiconductor material having a second band gap that is less than the first band gap. Emitter and collector regions present on opposing sides of the base region. The emitter and collector regions are composed of epitaxial III-V semiconductor material that is present on the intrinsic III-V semiconductor material.

ESD protection with asymmetrical bipolar-based device

An ESD protection device is fabricated in a semiconductor substrate that includes a semiconductor layer having a first conductivity type. A first well implantation procedure implants dopant of a second conductivity type in the semiconductor layer to form inner and outer sinker regions. The inner sinker region is configured to establish a common collector region of first and second bipolar transistor devices. A second well implantation procedure implants dopant of the first conductivity type in the semiconductor layer to form respective base regions of the first and second bipolar transistor devices. Conduction of the first bipolar transistor device is triggered by breakdown between the inner sinker region and the base region of the first bipolar transistor device. Conduction of the second bipolar transistor device is triggered by breakdown between the outer sinker region and the base region of the second bipolar transistor device.

Semiconductor device structure with non planar slide wall

A semiconductor device that includes a semiconductor structure having a side wall that is non planar and that extends farther outward at an upper portion than at a lower portion of the side wall. The semiconductor structure extends underneath a semiconductor layer wherein a top portion of the structure contacts the semiconductor layer.

ANODIC ETCHING OF SUBSTRATES
20170287721 · 2017-10-05 ·

A bi-directional bipolar junction transistor (BJT) structure, comprising: a base region of a first conductivity type, wherein said base region constitutes a drift region of said structure; first and second collector/emitter (CE) regions, each of a second conductivity type adjacent opposite ends of said base region; wherein said base region is lightly doped relative to said collector/emitter regions; the structure further comprising: a base connection to said base region, wherein said base connection is within or adjacent to said first collector/emitter region.

Bipolar junction transistor formed on fin structures

A method of forming a Bipolar Junction Transistor (BJT) includes forming an elongated collector line, forming an elongated emitter line parallel to the collector line, and forming an elongated base line parallel to the collector line and positioned between the collector line and the base line. The emitter line, the base line, and the collector line are formed over fin structures.

Lateral bipolar junction transistor (BJT) on a silicon-on-insulator (SOI) substrate
09748369 · 2017-08-29 · ·

A bipolar transistor is supported by a substrate including a semiconductor layer overlying an insulating layer. A transistor base is formed by a base region in the semiconductor layer that is doped with a first conductivity type dopant at a first dopant concentration. The transistor emitter and collector are formed by regions doped with a second conductivity type dopant and located adjacent opposite sides of the base region. An extrinsic base includes an epitaxial semiconductor layer in contact with a top surface of the base region. The epitaxial semiconductor layer is doped with the first conductivity type dopant at a second dopant concentration greater than the first dopant concentration. Sidewall spacers on each side of the extrinsic base include an oxide liner on a side of the epitaxial semiconductor layer and the top surface of the base region.

Monolithic integrated photonics with lateral bipolar and BiCMOS

After forming a first trench extending through a top semiconductor layer and a buried insulator layer and into a handle substrate of a semiconductor-on-insulator (SOI) substrate, a dielectric waveguide material stack including a lower dielectric cladding layer, a core layer and an upper dielectric cladding layer is formed within the first trench. Next, at least one lateral bipolar junction transistor (BJT), which can be a PNP BJT, an NPN BJT or a pair of complementary PNP BJT and NPN BJT, is formed in a remaining portion of the top semiconductor layer. After forming a second trench extending through the dielectric waveguide material stack to re-expose a portion of a bottom surface of the first trench, a laser diode is formed in the second trench.

BIPOLAR TRANSISTOR DEVICE AND METHOD OF FABRICATION

The disclosure relates to bipolar transistor devices and a method of fabricating the same. The device comprises a field plate, in an isolation region adjacent to a base-collector junction of said active region. The isolation region comprises a gate terminal arranged to be biased independently of a collector, base or emitter terminal of said transistor.

POWER DEVICE ON BULK SUBSTRATE

A metal-oxide-semiconductor field-effect transistor (MOSFET) power device includes an active region formed on a bulk semiconductor substrate, the active region having a first conductivity type formed on at least a portion of the bulk semiconductor substrate. A first terminal is formed on an upper surface of the structure and electrically connects with at least one other region having the first conductivity type formed in the active region. A buried well having a second conductivity type is formed in the active region and is coupled with a second terminal formed on the upper surface of the structure. The buried well and the active region form a clamping diode which positions a breakdown avalanche region between the buried well and the first terminal. A breakdown voltage of at least one of the power devices is a function of characteristics of the buried well.