This light-receiving element includes: a substrate; a photoelectric conversion layer that is provided on the substrate and includes a first compound semiconductor, and absorbs a wavelength in an infrared region to generate electric charges; a semiconductor layer that is provided on the photoelectric conversion layer and includes a second compound semiconductor, and has an opening in a selective region; and an electrode that buries the opening of the semiconductor layer and is electrically coupled to the photoelectric conversion layer.

A light receiving element (1) according to an embodiment of the disclosure includes a semiconductor layer (20) in which a photodiode having a PIN structure is provided in a mesa portion having a pillar shape. The photodiode includes a first conductive layer (21), an optical absorption layer (23), and a second conductive layer (24) having a light incident surface. In the light receiving element (1), the semiconductor layer (20) includes, in the vicinity of an interface between the first conductive layer (21) and the optical absorption layer (23), a constricted portion (26) that is the most constricted of the first conductive layer (21). The interface has an end exposed on an internal surface of the constricted portion (26).

A light receiving device includes a substrate, a first contact layer disposed on a surface of the substrate, a light receiving layer disposed on the first contact layer, an intermediate layer disposed on the light receiving layer, a wide-gap layer having a pn junction disposed on the intermediate layer, a second contact layer disposed on the wide-gap layer, and a groove formed for pixel isolation by removing the second contact layer and part of the wide-gap layer, wherein the intermediate layer has a wider band gap than the light receiving layer, and wherein the wide-gap layer has a wider band gap than the intermediate layer.

A method of fabricating a field-effect transistor in which a native oxide layer is removed prior to etching a gate recess. The cleaning step ensures that the etch of the gate recess starts at the same time across an entire sample, such that a uniform gate recess depth and profile can be achieved across an array of field-effect transistors. This results in a highly uniform switch-off voltage for the field-effect transistors in the array.

A photo detector includes a superlattice with an undoped first semiconductor layer including undoped intrinsic semiconductor material, a doped second semiconductor layer having a first conductivity type on the first semiconductor layer, an undoped third semiconductor layer including undoped intrinsic semiconductor material on the second semiconductor layer, and a fourth semiconductor layer having a second opposite conductivity type on the third semiconductor layer, along with a first contact having the first conductivity type in the first, second, third, and fourth semiconductor layers, and a second contact having the second conductivity type and spaced apart from the first contact in the first, second, third, and fourth semiconductor layers. An optical shield on a second shielded portion of a top surface of the fourth semiconductor layer establishes electron and hole lakes. A packaging structure includes an opening that allows light to enter an exposed first portion of the top surface of the fourth semiconductor layer.

A semiconductor relay includes: a substrate; a semiconductor layer of a direct transition type which is on the substrate and which has semi-insulating properties; a p-type semiconductor layer on at least part of the semiconductor layer; a first electrode; and a second electrode. The first electrode is electrically connected to the semiconductor layer and in contact with the p-type semiconductor layer. The second electrode is spaced apart from the first electrode and at least partially in contact with one of the semiconductor layer and the substrate, and the first electrode includes a first opening part.

The invention discloses a light emitting array structure. The light emitting array structure comprising: multiple light emitting dice on a substrate; wherein each light emitting die is physical and electrical separated by a street region; and each light emitting die comprising: a first type semiconductor layer; a second type semiconductor layer; an active layer interposed between a first surface of the first type semiconductor layer and a first surface of the second type semiconductor layer; a first reflector located above the second surface of the first type semiconductor layer, wherein the first reflector having an aperture allowing photons to escape from the second surface of the first type semiconductor layer; a second reflector located away from the first reflector and under the second surface of the second type semiconductor layer; an isolation layer formed on the sidewall surface of the first type semiconductor layer, the sidewall of the second type semiconductor layer and the sidewall of the active layer; a light collection module formed around the aperture.

A process for fabricating a hybrid optical detector, includes the steps of: assembling, via an assembly layer, on the one hand an absorbing structure and on the other hand a read-out circuit, locally etching, through the absorbing structure, the assembly layer and the read-out circuit up to the contacts, so as to form electrical via-holes, depositing a protective layer on the walls of the via-holes, producing a doped region of a second doping type different from the first doping type by diffusing a dopant into the absorbing structure through the protective layer, the region extending annularly around the via-holes so as to form a diode, depositing a metallization layer on the walls of the via-holes allowing the doped region to be electrically connected to the contact.

An electronic device includes a semiconductor nanoparticle, and a method of manufacturing the semiconductor nanoparticle is additionally provided. The semiconductor nanoparticle includes: a core including a first element; and a shell covering at least a portion of a surface of the core and including a second element and a third element, wherein the first element, the second element, and the third element are different from each other, and the first element and the second element are chemically bonded to each other on the at least a portion of the surface of the core.

A mid-infrared detector that uses a heavily doped material (e.g., indium arsenide) as a backplane to the detector structure to improve detector performance and fabrication cost. The infrared detector includes a substrate and a backplane of heavily doped material consisting of two or more of the following materials: indium, gallium, arsenic and antimony. The backplane re-sides directly on the substrate. The infrared detector further includes a photodetector (e.g., type-I or type-II strained layer superlattice (SLS) nBn photodetector, type-I or type-II SLS pn junction photodetector, a quantum-dot infrared photodetector, a quantum well infrared photodetector, a homogeneous material pn junction photodetector) residing directly on the backplane. Additionally, the infrared detector may include a metal structure residing directly on the photodetector. In this manner, the absorption of electromagnetic energy in the photodetector is enhanced.