A photo detection device comprising a contact layer through which light enters; an absorbing region positioned such that light admitted through the contact layer passes into the absorbing region; at least one diffractive element operatively associated with the absorbing region operating to diffract light into the absorbing region; the configuration of the at least one diffractive element being determined by computer simulation to determine an optimal diffractive element (or elements) and absorbing region configuration for optimal quantum efficiency for at least one predetermined wavelength detection range, the at least one diffractive element operating to diffract light entering through the contact layer such that phases of diffracted waves from locations within the photo detection device or waves reflected by sidewalls and waves reflected by the at least one diffractive element form a constructive interference pattern inside the absorbing region. A method of designing a photodetector comprises using a computer simulation to determine an optimal configuration for at least one wavelength range occurring when waves reflected by the diffractive element form a constructive interference pattern inside the absorbing region.

A photodetector is realized which does not need an additional circuit for an inspection and may perform a characteristic evaluation inspection of optical input and electrical output such as optical sensitivity and OE characteristics of a photodetector alone with respect to wavelength and temperature dependent characteristics. A photodetector is provided in which light absorption layers are formed on a semiconductor substrate, the photodetector detects signal light incident on the light absorption layers from a direction in a substrate surface of the semiconductor substrate, and the light absorption layers have a portion not covered by an electrode for photocurrent detection connected with the light absorption layers in a case where the substrate surface of the semiconductor substrate is seen from a direction from an outside of the substrate surface.

Some embodiments relate to an integrated circuit (IC) disposed on a silicon substrate, which includes a well region having a first conductivity type. An epitaxial pillar of SiGe or Ge extends upward from the well region. The epitaxial pillar includes a lower epitaxial region having the first conductivity type and an upper epitaxial region having a second conductivity type, which is opposite the first conductivity type. A dielectric layer is arranged over an upper surface of the substrate and is disposed around the lower epitaxial region to extend over outer edges of the well region. The dielectric layer has inner sidewalls that contact outer sidewalls of the epitaxial pillar. A dielectric sidewall structure has a bottom surface that rests on an upper surface of the dielectric layer and has inner sidewalls that extend continuously from the upper surface of the dielectric layer to a top surface of the epitaxial pillar.

An embodiment method of manufacturing an avalanche diode includes forming a first trench in a substrate material, filling the first trench with a first material that comprises a dopant, and causing the dopant to diffuse from the first trench to form part of a PN junction. An avalanche diode array can be formed to include a number of the avalanche diodes.

An optical apparatus including a semiconductor substrate; a first light absorption region supported by the semiconductor substrate, the first light absorption region including germanium and configured to absorb photons and to generate photo-carriers from the absorbed photons; a first layer supported by at least a portion of the semiconductor substrate and the first light absorption region, the first layer being different from the first light absorption region; one or more first switches controlled by a first control signal, the one or more first switches configured to collect at least a portion of the photo-carriers based on the first control signal; and one or more second switches controlled by a second control signal, the one or more second switches configured to collect at least a portion of the photo-carriers based on the second control signal, wherein the second control signal is different from the first control signal.

The invention relates to an optoelectronic device (1) comprising: at least one diode (2) that has a semiconductor portion (20) in which a PN or PIN junction is formed; a peripheral conductive layer (40) that extends in the main plane in such a way as to surround the semiconductor portion (20); a peripheral piezoelectric portion (30) that extends in the main plane in such a way as to surround the semiconductor portion (20); a first polarizing electric circuit (30) capable of generating an electric field in the peripheral piezoelectric portion (30) by applying an electric potential at least to the peripheral conductive layer (40) so as to induce a deformation of the peripheral piezoelectric portion (30) in the direction of the main plane, thus causing a tensile deformation of the semiconductor portion (20) in the main plane.

Semiconductor devices, such as photonics devices, employ substantially curved-shaped Silicon-Germanium (SiGe) structures and are fabricated using zero-change CMOS fabrication process technologies. In one example, a closed-loop resonator waveguide-coupled photodetector includes a silicon resonator structure formed in a silicon substrate, interdigitated n-doped well-implant regions and p-doped well-implant regions forming multiple silicon p-n junctions around the silicon resonator structure, and a closed-loop SiGe photocarrier generation region formed in a pocket within the interdigitated n-doped and p-doped well implant regions. The closed-loop SiGe region is located so as to substantially overlap with an optical mode of radiation when present in the silicon resonator structure, and traverses the multiple silicon p-n junctions around the silicon resonator structure. Electric fields arising from the respective p-n silicon junctions significantly facilitate a flow of the generated photocarriers between electric contact regions of the photodetector.

The invention relates to a process for fabricating at least tensilely strained planar photodiode 1, comprising producing a stack formed from a semiconductor layer 53, 55 made of a first material and from an antireflection layer 20; producing a peripheral trench 30 that opens onto a seed sublayer 22 made of a second material of the antireflection layer 20; epitaxy of a peripheral section 31 made of the second material in the peripheral trench 30; and returning to room temperature, a detecting section 10 then being tensilely strained because of the difference in coefficients of thermal expansion between the two materials.

At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.

Light detecting structures comprising a Si base having a pyramidal shape with a wide incoming light-facing pyramid bottom and a narrower pyramid top and a Ge photodiode formed on the Si pyramid top, wherein the Ge photodiode is operable to detect light in the short wavelength infrared range, and methods for forming such structures. A light detecting structure as above may be repeated spatially and fabricated in the form of a focal plane array of Ge photodetectors on silicon.