The invention relates to a multilayer semiconductor integrated circuit device where a stable multilayer structure is achieved. According to the invention, a first semiconductor integrated circuit device is provided with: a first n type trough semiconductor region that penetrates trough a first p type semiconductor body in the direction of the thickness and is connected to the potential of a grounded power supply; and a second n type through semiconductor region that is connected to the potential of a positive power supply, and a second semiconductor integrated circuit device, which has a first electrode and a second electrode respectively connected to the first n type through semiconductor region and the second n type through semiconductor region, is layered on the first semiconductor integrated circuit device.

A semiconductor device of the present invention is provided with a plurality of memory chips laminated to each other, each of said memory chips having: a first transmission/reception coil for communication by means of inductive coupling; first lead-out lines led out from both ends of the first transmission/reception coil; and a first transmission/reception circuit, which is connected to the first lead-out lines, and which inputs/outputs signals to/from the first transmission/reception coil. The semiconductor device is also provided with an interposer, which is disposed on one end in the laminating direction of the memory chips, and which has, for each of the memory chips: a second transmission/reception coil coupled to the first transmission/reception coil by means of inductive coupling; second lead-out lines led out from both ends of the second transmission/reception coil; and a second transmission/reception circuit, which is connected to the second lead-out lines, and which inputs/outputs signals to/from the second transmission/reception coil. The memory chips are disposed at positions where, in plan view, the first transmission/reception circuits overlap each other, and the first transmission/reception coils are disposed around the first transmission/reception circuits, said first transmission/reception coils being disposed at positions where the first transmission/reception coils do not overlap each other.

The objective of the invention is to provide technology allowing data taking a plurality of values to be transmitted and received using one set of coils when sending data through TCI technology using magnetic field coupling. This layered semiconductor device has at least a first semiconductor chip and a second semiconductor chip layered therein, the first semiconductor chip transmitting data in a contactless manner, and the second semiconductor chip receiving, in a contactless manner, the data that has been transmitted. The first semiconductor chip contains: a transmission unit outputting a transmission signal that may acquire, on the basis of the value of the data to be sent, at least 3 types of states representing the value of the data; and a transmission coil converting the transmission signal into a magnetic field signal. The second semiconductor chip contains: a reception coil whereby the magnetic field signal converted by the transmission coil is converted into a reception signal; and a reception unit reconstructing, on the basis of the state of the reception signal, the data that has been transmitted.

According to one embodiment, the interconnect layer includes a fourth conductive member and a fifth conductive member. The fourth conductive member is provided between the first region of the first chip and the third region of the second chip. The fourth conductive member connects the first conductive member of the first chip and the second conductive member of the second chip. The fifth conductive member is provided between the second region of the first chip and the fifth region of the third chip. The fifth conductive member connects the first conductive member of the first chip and the third conductive member of the third chip. The first chip is provided between the first terminal and the second terminal.

A blade computing system is described with a wireless communication between blades. In one embodiment, the system includes a first blade in the enclosure having a radio transceiver to communicate with a radio transceiver of a second blade in the enclosure. The second blade has a radio transceiver to communicate with the radio transceiver of the first blade. A switch in the enclosure communicates with the first blade and the second blade and establishes a connection through the respective radio transceivers between the first blade and the second blade.

Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more stacks of microelectronic devices are located on the substrate, and microelectronic devices of the stacks are connected to vertical conductive paths external to the stacks and extending to the substrate and to lateral conductive paths extending between the stacks. Methods of fabrication are also disclosed.

An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.

Semiconductor devices, systems including semiconductor devices, and methods of making and operating semiconductor devices. Such semiconductor devices can comprise a substrate, a first die mounted to the substrate, and a second die mounted to the first die in an offset position. The first die having first inductors at a first active side of the first die, the second inductors at a second active side of the second die, and a least one first inductor is proximate and inductively coupled to a second inductor. First interconnects electrically couple the substrate to the first die, and second interconnects electrically couple the second die to the substrate. The first interconnects extend from an upper surface of the substrate to the first active side, and the second interconnects extend from the second active side to the lower surface of the substrate.

Proximity coupling interconnect packaging systems and methods. A semiconductor package assembly comprises a substrate, a first semiconductor die disposed adjacent the substrate, and a second semiconductor die stacked over the first semiconductor die. There is at least one proximity coupling interconnect between the first semiconductor die and the second semiconductor die, the proximity coupling interconnect comprising a first conductive pad on the first coupling face on the first semiconductor die and a second conductive pad on a second coupling face of the second semiconductor die, the second conductive pad spaced apart from the first conductive pad by a gap distance and aligned with the first conductive pad. An electrical connector is positioned laterally apart from the proximity coupling interconnect and extends between the second semiconductor die and the substrate, the position of the electrical connector defining the alignment of the first conductive pad and the second conductive pad.

Disclosed herein are waveguide interconnect bridges for integrated circuit (IC) structures, as well as related methods and devices. In some embodiments, a waveguide interconnect bridge may include a waveguide material and one or more wall cavities in the waveguide material. The waveguide interconnect bridge may communicatively couple two dies in an IC package.